ci130x_dpmu.h

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#ifndef CI130X_DPMU_H
#define CI130X_DPMU_H

#include "ci130x_system.h"
#include "ci130x_scu.h"

typedef enum
{
    DPMU_LOWPOWER_NO_MODE = 0,
    DPMU_LOWPOWER_SLEEP_MODE = 1,
    DPMU_LOWPOWER_DEEP_SLEEP_MODE = 2,
    DPMU_LOWPOWER_BOTH_MODE = 3,
}Dpmu_Lowpower_Mode_t;

typedef enum
{
    DPMU_WAKEUP_GPIO             = 0, //aon gpio模块
    DPMU_WAKEUP_IWDG             = 1, //iwdg模块
    DPMU_WAKEUP_EFUSE            = 2, //efuse ctrl模块
    DPMU_WAKEUP_TIMER01_GPWM01   = 3, //timer0/1_gpwm0/1模块
    DPMU_WAKEUP_IO_REG           = 4, //DPMU里IO相关控制寄存器
    DPMU_WAKEUP_PMU_RC_REG       = 5, //DPMU里PMU及RC相关控制寄存器
}Dpmu_Wakeup_Reset_Cfg_t;

typedef enum
{
    DPMU_IO_PULL_DISABLE = 0,   
    DPMU_IO_PULL_UP     = 1,    
    DPMU_IO_PULL_DOWN   = 2,    
}Dpmu_Io_Pull_t;

typedef enum
{
    DPMU_IO_DIRECTION_INPUT = 0,  
    DPMU_IO_DIRECTION_OUTPUT = 1, 
}Dpmu_Io_Direction_t;

typedef enum
{
    DPMU_XTAL_EN      = 10,    
    DPMU_XTAL_BYP     = 9,     
    DPMU_XTAL_RF_EN   = 8,     
}Dpmu_Xtal_Mode_t;

typedef enum
{
    DPMU_IO_SCHMITT_TRIGGER_DISABLE = 0,  
    DPMU_IO_SCHMITT_TRIGGER_ENABLE = 1,   
}Dpmu_Io_Schmitt_Trigger_t;

typedef enum
{
    DPMU_IO_SLEW_RATE_SLOW = 0,    
    DPMU_IO_SLEW_RATE_FAST = 1,    
}Dpmu_Io_Slew_Rate_t;

typedef enum
{
    DPMU_IO_DRIVER_STRENGTH_0 = 0, 
    DPMU_IO_DRIVER_STRENGTH_1 = 1, 
    DPMU_IO_DRIVER_STRENGTH_2 = 2, 
    DPMU_IO_DRIVER_STRENGTH_3 = 3, 
}Dpmu_Io_Driver_Strength_t;

typedef enum
{
    DPMU_SRC_USE_SYSTEM_DEFAULT = 0,
    DPMU_SRC_USE_INNER_RC = 1,      
    DPMU_SRC_USE_OUTSIDE_OSC = 3,   
}Dpmu_Src_Source_Sel_t;


typedef enum
{
    DPMU_VDT_LV_2_4V = 0,   
    DPMU_VDT_LV_2_5V,       
    DPMU_VDT_LV_2_6V,       
    DPMU_VDT_LV_2_7V,       
    DPMU_VDT_LV_2_8V,       
    DPMU_VDT_LV_2_9V,       
    DPMU_VDT_LV_3_0V,       
    DPMU_VDT_LV_3_1V,       
}Dpmu_Vdt_Lv_t;


typedef enum
{
    DPMU_UPDATE_EN_NUM_LDO1 = 0, 
    DPMU_UPDATE_EN_NUM_LDO2,     
    DPMU_UPDATE_EN_NUM_LDO3,     
    DPMU_UPDATE_EN_NUM_VDT,      
    DPMU_UPDATE_EN_NUM_TRIM,     
}Dpmu_Update_En_Num_t;


typedef enum
{
    DPMU_RC_FREQ_12d288M = 0,
    DPMU_RC_FREQ_2M,
    DPMU_RC_FREQ_4M,
    DPMU_RC_FREQ_8M,
    DPMU_RC_FREQ_16M,
    DPMU_RC_FREQ_24M,
    DPMU_RC_FREQ_32M,
    DPMU_RC_FREQ_64M,
}Dpmu_Rc_Freq_Sel_t;

typedef enum
{
    DPMU_LDO1_LV_2_75V  = 0,       
    DPMU_LDO1_LV_2_8V   = 1,       
    DPMU_LDO1_LV_2_85V  = 2,       
    DPMU_LDO1_LV_2_9V   = 3,       
    DPMU_LDO1_LV_2_95V  = 4,       
    DPMU_LDO1_LV_3_0V   = 5,       
    DPMU_LDO1_LV_3_05V  = 6,       
    DPMU_LDO1_LV_3_1V   = 7,       
    DPMU_LDO1_LV_3_15V  = 8,       
    DPMU_LDO1_LV_3_2V   = 9,       
    DPMU_LDO1_LV_3_25V  = 10,      
    DPMU_LDO1_LV_3_3V   = 11,      
    DPMU_LDO1_LV_3_35V  = 12,      
    DPMU_LDO1_LV_3_4V   = 13,      
    DPMU_LDO1_LV_3_45V  = 14,      
    DPMU_LDO1_LV_3_5V   = 15,      
}Dpmu_LDO1_Lv_t;

typedef enum
{
    DPMU_LDO2_LV_2_725VV = 0,      
    DPMU_LDO2_LV_2_75V   = 1,      
    DPMU_LDO2_LV_3_5V    = 31,     
}Dpmu_LDO2_Lv_t;

typedef enum
{
    DPMU_LDO3_LV_0_85V   = 0,       
    DPMU_LDO3_LV_0_875V  = 1,       
    DPMU_LDO3_LV_0_9V    = 2,       
    DPMU_LDO3_LV_0_925V  = 3,       
    DPMU_LDO3_LV_0_95V   = 4,       
    DPMU_LDO3_LV_0_975V  = 5,       
    DPMU_LDO3_LV_1_0V    = 6,       
    DPMU_LDO3_LV_1_025V  = 7,       
    DPMU_LDO3_LV_1_05V   = 8,       
    DPMU_LDO3_LV_1_075V  = 9,       
    DPMU_LDO3_LV_1_1V    = 10,      
    DPMU_LDO3_LV_1_125V  = 11,      
    DPMU_LDO3_LV_1_15V   = 12,      
    DPMU_LDO3_LV_1_175   = 13,      
    DPMU_LDO3_LV_1_2V    = 14,      
    DPMU_LDO3_LV_1_225V  = 15,      
}Dpmu_LDO3_Lv_t;

typedef enum
{
    DPMU_PMU_TRIM_LV_0_71V    = 0,      
    DPMU_PMU_TRIM_LV_0_7156V  = 1,      
    DPMU_PMU_TRIM_LV_0_88V    = 31,     
}Dpmu_PMU_Trim_Lv_t;

void dpmu_unlock_cfg_config(void);

void dpmu_lock_cfg_config(void);

void dpmu_set_io_reuse(PinPad_Name pin,IOResue_FUNCTION io_function);

void dpmu_set_adio_reuse(PinPad_Name pin,ADIOResue_MODE adio_mode);

void dpmu_set_io_open_drain(PinPad_Name pin,FunctionalState cmd);

void dpmu_set_io_pull(PinPad_Name pin,Dpmu_Io_Pull_t pull);

void dpmu_set_io_direction(PinPad_Name pin,Dpmu_Io_Direction_t dir);

void dpmu_set_io_slew_rate(PinPad_Name pin,Dpmu_Io_Slew_Rate_t slew_rate);

void dpmu_set_io_schmitt_trigger(PinPad_Name pin,Dpmu_Io_Schmitt_Trigger_t schmitt_trigger);

void dpmu_set_io_driver_strength(PinPad_Name pin,Dpmu_Io_Driver_Strength_t driver_strength);

void dpmu_osc_pad_for_gpio(FunctionalState en);

void dpmu_iwdg_reset_none_config(void);

void dpmu_iwdg_reset_system_config(void);

void dpmu_iwdg_reset_bus_config(void);

void dpmu_twdg_reset_none_config(void);

void dpmu_twdg_reset_sysytem_config(void);

void dpmu_twdg_reset_bus_config(void);

void dpmu_software_reset_none_config(void);

void dpmu_software_reset_system_config(void);

void dpmu_software_reset_bus_config(void);

void dpmu_core_reset_none_config();

void dpmu_core_reset_system_config();

void dpmu_core_reset_bus_config();

void dpmu_set_ext_filter_config(Ext_Num num,FunctionalState flag,uint32_t param);

void dpmu_set_iwdg_halt();

void dpmu_clean_iwdg_halt();

void dpmu_set_src_source(Dpmu_Src_Source_Sel_t sel);

void dpmu_pmu_trim_en(bool en);

void dpmu_set_pmu_trim_value(uint8_t val);

uint8_t dpmu_get_pmu_trim_value(void);

void dpmu_pmu_div_resistance_en(bool en);

void dpmu_vdt_lv_set(Dpmu_Vdt_Lv_t lv);

void dpmu_vdt_en(bool en);

void dpmu_ldo2_en(bool en);

void dpmu_ldo3_en(bool en);

void dpmu_ldo1_lv_set(uint8_t lv);

void dpmu_ldo2_lv_set(uint8_t lv);

void dpmu_ldo3_lv_set(uint8_t lv);

void dpmu_config_update_en(Dpmu_Update_En_Num_t num);

void dpmu_rc_freq_sel(Dpmu_Rc_Freq_Sel_t sel);

void dpmu_set_rc_trim_c_value(uint8_t val);

void dpmu_set_rc_trim_f_value(uint8_t val);

void dpmu_set_rc_en(bool en);

void dpmu_set_rc_update_cfg(void);

void dpmu_pll_config(uint32_t in_clk, uint32_t out_clk);

uint32_t dpmu_get_pll_frequency();

void dpmu_set_vdt_mask(bool en);

void dpmu_osc_pad_cfg_fma(uint8_t num);

void dpmu_use_rc(void);

void dpmu_set_low_power_mode(Dpmu_Lowpower_Mode_t mode);
void dpmu_wakeup_reset_cfg(Dpmu_Wakeup_Reset_Cfg_t model, FunctionalState flag);

void dpmu_set_wakeup_int(int32_t wake_int_num,FunctionalState flag);

uint32_t dpmu_get_wakeup_state(void);

#endif /*CI130X_DPMU_H*/