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Integrated Circuit Bus (IIC)


1. Overview of IIC

IIC bus is developed by Philips Semiconductor Corporation, which is a kind of double line and bidirectional serial bus used to connect chips. The IIC bus consists of a serial data line (SDA) and a serial clock line (SCL). Allows multiple Master and multiple Slave devices to share the bus. At any time, the bus can only be controlled by one master device. When the slave device is idle, the bus starts data transmission. It includes bus conflict checking and arbitration mechanisms to ensure that data will not be lost when multiple hosts attempt to control the bus. The bus is particularly suitable for short distance communication between multiple devices. I Ā² The standard speed of C bus is 100kbit/s, and the fast mode is 400kbit/s. CI130X has only one set of IIC0.


2. IIC timing

2.1 Basic introduction

-SDA (serial data line, bidirectional I/O line) -SCL (serial clock cable, provided by master) -Programmable device can be used as master or slave -Master (host, start signal transmission, clock generator, stop signal transmission) -slave -ACK -NACK (no data is received, or the sender is told to stop sending)

2.2 Physical topology of I2C bus

-The bus can connect multiple devices. Each device connected to the bus has a unique address. Only one master is allowed to initiate a request at a time.

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2.3 Sequence diagram analysis

-(1) . Master writes data to slave (transmission direction remains unchanged)

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-(2) . The master writes data to the slave, and then reads data back from the slave (the transmission direction changes)

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-(3) . The master reads data from the slave (the transmission direction remains unchanged)

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3态API

Function name Description
iic_polling_init Master or Slave mode query mode initialization
iic_master_polling_send Master query method sends data
iic_master_polling_recv Master query method to receive data
iic_master_multi_transmission Master sends multiple messages
iic_slave_polling_send Send data by Slave query
iic_slave_polling_recv Receive data in Slave query mode
iic_interrupt_init Master or Slave mode interrupt mode initialization
iic_master_interrupt_send Master interrupts sending data
iic_master_interrupt_recv Master interrupts to receive data
iic_slave_interrupt_send Slave interrupt mode sends data
iic_slave_interrupt_recv Slave interrupt mode receives data
i2c_master_only_send Only one message for sending data
i2c_master_send_recv Two messages that send data first and then read data
i2c_master_only_recv Only one message for reading data


4. Example

#include "ci130x_iic. h"/* Includes I2C related interface definitions*/
#include "ci130x_system. h"/* Includes I2C registers and base address related definitions*/


/*Without the read/write bit, the IIC device address is shifted one bit to the left, or 0x40, 0x41 after the upper read/write bit*/
#define IIC_ TEST_ SLAVE_ ADDR  0x20


void i2c_ master_ test()
{
/*Customizable I/O pin initialization*/
pad_ config_ for_ i2c();

/*Initialization of master mode, IIC0 bus, 100K rate. Setting your address to 0 indicates master mode, and setting it to a valid value indicates slave mode, and timeout waiting time*/
iic_ polling_ init(IIC0,100,0,LONG_TIME_OUT);

/*Write only 5 bytes to the device whose IIC device address is 0x20*/
char only_ send_ buf[5] = {0x01,0x02,0x03,0x04,0x05} ;
i2c_ master_ only_ send(IIC_TEST_SLAVE_ADDR,only_send_buf,5);

/*Write 1 byte and then read 5 bytes to the device whose IIC device address is 0x20*/
char send_ recv_ buf [10] = {0} ;
send_ recv_ buf [0] = 0x01;
i2c_ master_ send_ recv(IIC_TEST_SLAVE_ADDR,send_recv_buf,1,10);

/*Read only 5 bytes to the device whose IIC device address is 0x20*/
char only_ recv_ buf [10] = {0} ;
i2c_ master_ only_ recv(IIC_TEST_SLAVE_ADDR,only_recv_buf,10);
}