CI13LC SDK API手册
2.1.1
本手册用于描述CI13LC SDK各个组件和驱动API
概述
API参考
driver
ci13lc_chip_driver
inc
ci1332x.h
浏览该文件的文档.
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#ifndef _CI_1324X_H_
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#define _CI_1324X_H_
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#include "
ci13lc.h
"
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typedef
enum
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{
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/***-----PAD-----****************----analgo--****----1st-----****---2nd-----****----3rd----****----4th----****----5th----****----6th----****----7th----****/
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PA0
= 0,
/* OSC_IN PA_0 PWM2 --- --- --- --- --- */
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PA1
= 1,
/* OSC_OUT PA_1 --- --- --- --- --- --- */
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BOOT_SEL_0_PAD
= 2,
/* BOOT_SEL_0 --- --- --- --- --- --- */
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SPI0_CS_PAD
= 3,
/* SPI0_CS --- --- --- --- --- --- */
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SPI0_D1_PAD
= 4,
/* SPI0_D1 --- --- --- --- --- --- */
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SPI0_D2_PAD
= 5,
/* SPI0_D2 --- --- --- --- --- --- */
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PA2
= 6,
/* PA_2 IIS0_SDI IIC0_SDA UART1_TX PWM0 PWMP --- */
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PA3
= 7,
/* PA_3 IIS0_LRCLK IIC0_SCL UART1_RX PWM1 PWMN --- */
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PA4
= 8,
/* PA_4 IIS0_SDO --- --- PWM2 PWMP --- */
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PA5
= 9,
/* PA_5 IIS0_SCLK --- UART2_TX PWM3 PWMN --- */
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PA6
= 10,
/* PA_6 IIS0_MCLK --- UART2_RX PWM0 INTER_CLKOUT --- */
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PA7
= 11,
/* PA_7 PWM0 UART1_TX EXT_INT0 --- --- --- */
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PB0
= 12,
/* PB_0 PWM1 UART1_RX EXT_INT1 --- --- --- */
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PB1
= 13,
/* PB_1 PWM2 UART2_TX PWMP --- --- --- */
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PB2
= 14,
/* PB_2 PWM3 UART2_RX PWMN --- --- --- */
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PB5
= 17,
/* PB_5 UART0_TX IIC0_SDA PWM1 PWMP --- INTER_CLKOUT */
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PB6
= 18,
/* PB_6 UART0_RX IIC0_SCL PWM2 PWMN --- --- */
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PB7
= 19,
/* PB_7 --- --- --- --- --- --- */
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KEY_RSTN_PAD
= 21,
/* KEY_RSTN --- --- --- --- --- --- */
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TEST_EN_PAD
= 22,
/* TEST_EN --- --- --- --- --- --- */
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SPI0_D0_PAD
= 23,
/* SPI0_D0 --- --- --- --- --- --- */
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SPI0_CLK_PAD
= 24,
/* SPI0_CLK --- --- --- --- --- --- */
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SPI0_D3_PAD
= 25,
/* SPI0_D3 --- --- --- --- --- --- */
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PC1
= 26,
/* --- PC_1 UART2_TX PWM3 --- --- --- */
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PC2
= 27,
/* --- PC_2 UART2_RX PWM2 INTER_CLKOUT --- --- */
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PC3
= 28,
/* --- PC_3 IIC0_SDA PWM1 --- --- --- */
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PC4
= 29,
/* --- PC_4 IIC0_SCL PWM0 --- --- --- */
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PC5
= 30,
/* PC_5 --- --- --- --- --- --- */
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}
PinPad_Name
;
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#endif // _CI_1324X_H_
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TEST_EN_PAD
Definition:
ci1332x.h:39
PB5
Definition:
ci1332x.h:35
SPI0_D0_PAD
Definition:
ci1332x.h:40
PinPad_Name
PinPad_Name
Definition:
ci1332x.h:17
SPI0_CS_PAD
Definition:
ci1332x.h:23
PA1
Definition:
ci1332x.h:21
KEY_RSTN_PAD
Definition:
ci1332x.h:38
PB2
Definition:
ci1332x.h:34
PA6
Definition:
ci1332x.h:30
PA3
Definition:
ci1332x.h:27
SPI0_CLK_PAD
Definition:
ci1332x.h:41
PA4
Definition:
ci1332x.h:28
SPI0_D2_PAD
Definition:
ci1332x.h:25
PB0
Definition:
ci1332x.h:32
PB6
Definition:
ci1332x.h:36
PC2
Definition:
ci1332x.h:44
PA5
Definition:
ci1332x.h:29
BOOT_SEL_0_PAD
Definition:
ci1332x.h:22
PA2
Definition:
ci1332x.h:26
ci13lc.h
芯片系列公用头文件
PC1
Definition:
ci1332x.h:43
PC4
Definition:
ci1332x.h:46
PC3
Definition:
ci1332x.h:45
SPI0_D1_PAD
Definition:
ci1332x.h:24
PC5
Definition:
ci1332x.h:47
PB1
Definition:
ci1332x.h:33
PB7
Definition:
ci1332x.h:37
PA7
Definition:
ci1332x.h:31
SPI0_D3_PAD
Definition:
ci1332x.h:42
PA0
Definition:
ci1332x.h:20
制作者
1.8.14