CI13LC SDK API手册  2.1.1
本手册用于描述CI13LC SDK各个组件和驱动API
结构体 | 宏定义 | 类型定义 | 枚举
ci13lc.h 文件参考

芯片系列公用头文件 更多...

#include <stdint.h>
#include "user_config.h"

浏览源代码.

结构体

struct  SCU_TypeDef
 
struct  DPMU_TypeDef
 DPMU寄存器结构体 更多...
 
struct  UART_TypeDef
 
struct  DMACChanx_TypeDef
 
struct  DMA_TypeDef
 
struct  DMAC_LLI
 
struct  IISDMAChanx_TypeDef
 
struct  IISDMA_TypeDef
 
struct  CODEC_ALC_TypeDef
 
struct  CODEC_TypeDef
 
struct  EPWM_TypeDef
 
struct  PVDC_TypeDef
 

宏定义

#define IRQn_MAX_NUMBER   (51)
 
#define IPCORE_BASE   (0xa6a6a6a6)
 
#define APB_BASE   (0x5a5a5a5a)
 
#define SYSTICK_BASE   (0x77777777)
 
#define HAL_DTRFLASH_RAM_BASE   (0x45454545)
 
#define HAL_SCU_BASE   (0x40000000)
 
#define HAL_GDMA_BASE   (0x40001000)
 
#define HAL_IISDMA0_BASE   (0x40003000)
 
#define HAL_DTRFLASH_BASE   (0x40004000)
 
#define HAL_NPU_BASE   (0x40006000)
 
#define HAL_EPWM_BASE   (0x40007000)
 
#define HAL_IIC0_BASE   (0x40011000)
 
#define HAL_CODEC_BASE   (0x40013000)
 
#define HAL_PWM0_BASE   (0x40014000)
 
#define HAL_PWM1_BASE   (0x40015000)
 
#define HAL_PWM2_BASE   (0x40016000)
 
#define HAL_PWM3_BASE   (0x40017000)
 
#define HAL_TIMER0_BASE   (0x40018000)
 
#define HAL_TIMER1_BASE   (0x40019000)
 
#define CODEC_AD_GATE   (0x4001c000)
 
#define CODEC_DA_GATE   (0x4001d000)
 
#define HAL_PA_BASE   (0x40020000)
 
#define HAL_PB_BASE   (0x40021000)
 
#define HAL_UART0_BASE   (0x40022000)
 
#define HAL_UART1_BASE   (0x40023000)
 
#define HAL_UART2_BASE   (0x40024000)
 
#define HAL_IIS0_BASE   (0x40025000)
 
#define HAL_IIS1_BASE   (0x40026000)
 
#define IIS1_RX_GATE   (0x40029000)
 
#define IIS1_TX_GATE   (0x4002A000)
 
#define HAL_DPMU_BASE   (0x40030000)
 
#define HAL_PC_BASE   (0x40031000)
 
#define HAL_IWDG_BASE   (0x40032000)
 
#define HAL_EFUSE_BASE   (0x40033000)
 
#define HAL_PVDC_BASE   (0x40034000)
 
#define IWDG_CPU0_HALT_GATE   (0x40036000)
 
#define IWDG_CPU1_HALT_GATE   (0x40037000)
 
#define PLL_BASE   (0x40038000)
 
#define TEST_CLK_BASE   (0x40039000)
 
#define TEST_CLK_BASE1   (0x4003a000)
 
#define IWDG_RCCLK_BASE   (0x4003b000)
 
#define IWDG_OSCCLK_BASE   (0x4003c000)
 
#define SPI0FIFO_BASE   (0x60000000)
 
#define UART0FIFO_BASE   (0x61000000)
 
#define UART1FIFO_BASE   (0x62000000)
 
#define UART2FIFO_BASE   (0x63000000)
 
#define SCU   ((SCU_TypeDef*)HAL_SCU_BASE)
 
#define DPMU   ((DPMU_TypeDef*)HAL_DPMU_BASE)
 
#define UART0   ((UART_TypeDef*)HAL_UART0_BASE)
 
#define UART1   ((UART_TypeDef*)HAL_UART1_BASE)
 
#define UART2   ((UART_TypeDef*)HAL_UART2_BASE)
 
#define CODEC   ((CODEC_TypeDef*)HAL_CODEC_BASE)
 
#define DMAC   ((DMA_TypeDef*)HAL_GDMA_BASE)
 
#define IISDMA0   ((IISDMA_TypeDef*)HAL_IISDMA0_BASE)
 
#define EPWM   ((EPWM_TypeDef*)HAL_EPWM_BASE)
 
#define PVDC   ((PVDC_TypeDef*)HAL_PVDC_BASE)
 

类型定义

typedef enum IRQn IRQn_Type
 

枚举

enum  IRQn {
  MSIP_IRQn = 3,
  MTIP_IRQ = 7,
  SCU_IRQn = 19 + 1,
  NPU_IRQn = 19 + 2,
  EPWM_IRQn = 19 + 3,
  DMA_IRQn = 19 + 4,
  TIMER0_IRQn = 19 + 5,
  TIMER1_IRQn = 19 + 6,
  IIC0_IRQn = 19 + 9,
  PA_IRQn = 19 + 10,
  PB_IRQn = 19 + 11,
  UART0_IRQn = 19 + 12,
  UART1_IRQn = 19 + 13,
  UART2_IRQn = 19 + 14,
  IIS0_IRQn = 19 + 15,
  IIS1_IRQn = 19 + 16,
  IIS_DMA_IRQn = 19 + 18,
  ALC_TIMEOUT_IRQn = 19 + 19,
  DTR_IRQn = 19 + 21,
  V11_OK_IRQn = 19 + 22,
  VDT_IRQn = 19 + 23,
  EXT0_IRQn = 19 + 24,
  EXT1_IRQn = 19 + 25,
  IWDG_IRQn = 19 + 26,
  PVDC_IRQn = 19 + 28,
  EFUSE_IRQn = 19 + 29,
  PC_IRQn = 19 + 30
}
 
enum  Ext_Num {
  EXT0 = 0,
  EXT1 = 1
}
 

详细描述

芯片系列公用头文件

版本
0.1
日期
2024-05-30
版权所有
Copyright (c) 2024 Chipintelli Technology Co., Ltd.

结构体说明

◆ SCU_TypeDef

struct SCU_TypeDef
成员变量
volatile unsigned int AHB_CLKGATE_CFG

offest:0x124 功能:

volatile unsigned int AHB_RESET_CFG

offest:0x190 功能:

volatile unsigned int APB0_CLKGATE_CFG

offest:0x128 功能:

volatile unsigned int APB0_RESET_CFG

offest:0x194 功能:

volatile unsigned int APB1_CLKGATE_CFG

offest:0x12C 功能:

volatile unsigned int APB1_RESET_CFG

offest:0x198 功能:

volatile unsigned int BOOT_ADDR_CFG

offest:0x2C0 功能:

volatile unsigned int CKCFG_LOCK_CFG

offest:0x58 功能:

volatile unsigned int CLK_DIV_PARAM0_CFG

offest:0x80 功能:

volatile unsigned int CLK_DIV_PARAM1_CFG

offest:0x84 功能:

volatile unsigned int CLK_DIV_PARAM2_CFG

offest:0x88 功能:

volatile unsigned int CLK_DIV_PARAM_EN_CFG

offest:0xB0 功能:

volatile unsigned int CODEC_CLK_SEL_CFG

offest:0xF4 功能:

volatile unsigned int DUALCORE_JTAG_MD

offest:0x2D4 功能:

volatile unsigned int EFUSE_TEST_MD

offest:0x2D8 功能:

volatile unsigned int EXT0_FILTER_CFG

offest:0x1E4 功能:

volatile unsigned int EXT1_FILTER_CFG

offest:0x1E8 功能:

volatile unsigned int EXT_INT_CFG

offest:0x0C 功能:

volatile unsigned int IIS0_CLK_SEL_CFG

offest:0xE0 功能:

volatile unsigned int IIS1_CLK_SEL_CFG

offest:0xE4 功能:

volatile unsigned int IIS_DATA_SEL_CFG

offest:0x264 功能:

volatile unsigned int INT_STATE_REG0

offest:0x1F4 功能:

volatile unsigned int INT_STATE_REG1

offest:0x1F8 功能:

volatile unsigned int MCLK0_CFG

offest:0xD0 功能:

volatile unsigned int MCLK1_CFG

offest:0xD4 功能:

volatile unsigned int MEM0_EMA_CFG

offest:0x240 功能:

volatile unsigned int MEM1_EMA_CFG

offest:0x244 功能:

volatile unsigned int MEM2_EMA_CFG

offest:0x248 功能:

volatile unsigned int PAD_CLK_SEL_CFG

offest:0xF0 功能:

volatile unsigned int PAD_STATE

offest:0x290 功能:

volatile uint32_t REV_SYR_CFG_0[(0x0C-0x00)/4-0x1]
volatile uint32_t REV_SYR_CFG_1[(0x50-0x0C)/4-0x1]
volatile uint32_t REV_SYR_CFG_10[(0x190-0x178)/4-0x1]
volatile uint32_t REV_SYR_CFG_11[(0x1DC-0x198)/4-0x1]
volatile uint32_t REV_SYR_CFG_12[(0x1F4-0x1E8)/4-0x1]
volatile uint32_t REV_SYR_CFG_14[(0x240-0x1F8)/4-0x1]
volatile uint32_t REV_SYR_CFG_15[(0x264-0x248)/4-0x1]
volatile uint32_t REV_SYR_CFG_16[(0x290-0x264)/4-0x1]
volatile uint32_t REV_SYR_CFG_17[(0x2C0-0x290)/4-0x1]
volatile uint32_t REV_SYR_CFG_18[(0x2D4-0x2C0)/4-0x1]
volatile uint32_t REV_SYR_CFG_2[(0x80-0x58)/4-0x1]
volatile uint32_t REV_SYR_CFG_3[(0xB0-0x88)/4-0x1]
volatile uint32_t REV_SYR_CFG_4[(0xC0-0xB0)/4-0x1]
volatile uint32_t REV_SYR_CFG_5[(0xD0-0xC4)/4-0x1]
volatile uint32_t REV_SYR_CFG_6[(0xE0-0xD4)/4-0x1]
volatile uint32_t REV_SYR_CFG_7[(0xF0-0xE4)/4-0x1]
volatile uint32_t REV_SYR_CFG_8[(0x11C-0xF4)/4-0x1]
volatile uint32_t REV_SYR_CFG_9[(0x178-0x12C)/4-0x1]
volatile unsigned int RSTCFG_LOCK_CFG

offest:0x54 功能:

volatile unsigned int SCU_STATE_REG

offest:0x178 功能:

volatile unsigned int SRC0_MCLK_CFG

offest:0xC0 功能:

volatile unsigned int SRC1_MCLK_CFG

offest:0xC4 功能:

volatile unsigned int SYS_CLKGATE_CFG0

offest:0x11C 功能:

volatile unsigned int SYS_CLKGATE_CFG1

offest:0x120 功能:

volatile unsigned int SYS_CTRL_CFG

offest:0x00 功能:

volatile unsigned int SYSCFG_LOCK_CFG

offest:0x50 功能:

volatile unsigned int WAKEUP_MASK_CFG0

offest:0x1DC 功能:

volatile unsigned int WAKEUP_MASK_CFG1

offest:0x1E0 功能:

◆ DPMU_TypeDef

struct DPMU_TypeDef

DPMU寄存器结构体

成员变量
volatile unsigned int AD_CFG0

offest:0x190 功能:

volatile unsigned int AON_CLK_PARAM_CFG

offest:0x34 功能:

volatile unsigned int AON_CLK_PARAM_CFG1

offest:0x38 功能:

volatile unsigned int AON_CLK_PARAM_EN_CFG

offest:0x40 功能:

volatile unsigned int AON_CLKGATE_CFG

offest:0x50 功能:

volatile unsigned int AON_RESET_CFG

offest:0x70 功能:

volatile unsigned int CFG_LOCK_CFG

offest:0x00 功能:

volatile unsigned int CHIP_INT_MASK_CFG_ADDR

offest:0x1E4 功能:

volatile unsigned int CHIP_STATE_REG_ADDR

offest:0x1E0 功能:

volatile unsigned int DS_CFG0

offest:0x160 功能:

volatile unsigned int DS_CFG1

offest:0x164 功能:

volatile unsigned int IE_CFG0

offest:0x180 功能:

volatile unsigned int IOREUSE_CFG0

offest:0x140 功能:

volatile unsigned int IOREUSE_CFG1

offest:0x144 功能:

volatile unsigned int LOW_POWER_CFG

offest:0xD0 功能:

volatile unsigned int OD_CFG0

offest:0x14c 功能:

volatile unsigned int OSC_PAD_CFG

offest:0x108 功能:

volatile unsigned int PAD_FILTER_CFG_ADDR

offest:0x1E8 功能:

volatile unsigned int PD_CFG0

offest:0x150 功能:

volatile unsigned int PLL_CFG

offest:0x30 功能:

volatile unsigned int PMU_CFG

offest:0xC0 功能:

volatile unsigned int PMU_PWROFF_CFG

offest:0xD4 功能:

volatile unsigned int PMU_PWRON_CFG

offest:0xD8 功能:

volatile unsigned int PMU_UPDATE_EN

offest:0xC8 功能:

volatile unsigned int PU_CFG0

offest:0x158 功能:

volatile unsigned int PWR_WAKEUP_STATE_REG

offest:0x1D0 功能:

volatile unsigned int RC_CFG

offest:0x100 功能:

volatile unsigned int RC_UPDATE_CFG

offest:0x104 功能:

volatile uint32_t REV_SYR_CFG_0[(0x10-0x00)/4-0x1]
volatile uint32_t REV_SYR_CFG_1[(0x20-0x14)/4-0x1]
volatile uint32_t REV_SYR_CFG_10[(0x100-0xEC)/4-0x1]
volatile uint32_t REV_SYR_CFG_11[(0x140-0x108)/4-0x1]
volatile uint32_t REV_SYR_CFG_12[(0x14c-0x144)/4-0x1]
volatile uint32_t REV_SYR_CFG_13[(0x158-0x150)/4-0x1]
volatile uint32_t REV_SYR_CFG_14[(0x160-0x158)/4-0x1]
volatile uint32_t REV_SYR_CFG_15[(0x170-0x164)/4-0x1]
volatile uint32_t REV_SYR_CFG_16[(0x178-0x170)/4-0x1]
volatile uint32_t REV_SYR_CFG_17[(0x180-0x178)/4-0x1]
volatile uint32_t REV_SYR_CFG_18[(0x190-0x180)/4-0x1]
volatile uint32_t REV_SYR_CFG_19[(0x1C0-0x190)/4-0x1]
volatile uint32_t REV_SYR_CFG_2[(0x30-0x20)/4-0x1]
volatile uint32_t REV_SYR_CFG_20[(0x1D0-0x1C0)/4-0x1]
volatile uint32_t REV_SYR_CFG_21[(0x1E0-0x1D0)/4-0x1]
volatile uint32_t REV_SYR_CFG_3[(0x40-0x38)/4-0x1]
volatile uint32_t REV_SYR_CFG_4[(0x50-0x40)/4-0x1]
volatile uint32_t REV_SYR_CFG_5[(0x70-0x50)/4-0x1]
volatile uint32_t REV_SYR_CFG_6[(0xC0-0x70)/4-0x1]
volatile uint32_t REV_SYR_CFG_7[(0xC8-0xC0)/4-0x1]
volatile uint32_t REV_SYR_CFG_8[(0xD0-0xC8)/4-0x1]
volatile uint32_t REV_SYR_CFG_9[(0xE0-0xD8)/4-0x1]
volatile unsigned int RST_STATE_REG

offest:0x1C0 功能:

volatile unsigned int SL_CFG0

offest:0x170 功能:

volatile unsigned int ST_CFG0

offest:0x178 功能:

volatile unsigned int SYS_CLK_SEL_CFG

offest:0x20 功能:

volatile unsigned int SYS_RESET_CFG

offest:0x10 功能:

volatile unsigned int SYS_SOFTRST_CFG

offest:0x14 功能:

volatile unsigned int V2I_CFG

offest:0x1EC 功能:

volatile unsigned int WAKEUP_CFG

offest:0xEC 功能:

volatile unsigned int WAKEUP_EXT_FILTER_CFG

offest:0xE8 功能:

volatile unsigned int WAKEUP_MASK_CFG

offest:0xE4 功能:

volatile unsigned int WAKEUP_RESET_CFG

offest:0xE0 功能:

◆ UART_TypeDef

struct UART_TypeDef
成员变量
volatile unsigned int BAUD_CR
volatile unsigned int BAUD_ICR
volatile unsigned int BAUD_MASK_INT
volatile unsigned int BAUD_MIS
volatile unsigned int BAUD_RIS
volatile unsigned int BAUD_SMPL_0
volatile unsigned int BAUD_SMPL_RATE
volatile unsigned int BAUD_STATUS
volatile unsigned int BYTE_HW_MODE
volatile unsigned int REMCR
volatile unsigned int REMINTCLR
volatile unsigned int REMINTSTAE
volatile unsigned int REMRXDATA
volatile unsigned int REMTXDATA
volatile unsigned int UARTCR
volatile unsigned int UARTDMACR
volatile unsigned int UARTFBrd
volatile unsigned int UARTFIFOlevel
volatile unsigned int UARTFlag
volatile unsigned int UARTIBrd
volatile unsigned int UARTICR
volatile unsigned int UARTLCR
volatile unsigned int UARTMaskInt
volatile unsigned int UARTMIS
volatile unsigned int UARTRdDR
volatile unsigned int UARTRIS
volatile unsigned int UARTRxErrStat
volatile unsigned int UARTTimeOut
volatile unsigned int UARTWrDR

◆ DMACChanx_TypeDef

struct DMACChanx_TypeDef
成员变量
volatile unsigned int DMACCxConfiguration
volatile unsigned int DMACCxControl
volatile unsigned int DMACCxDestAddr
volatile unsigned int DMACCxLLI
volatile unsigned int DMACCxSrcAddr
unsigned int reserved[3]

◆ DMA_TypeDef

struct DMA_TypeDef
成员变量
DMACChanx_TypeDef DMACChannel[8]
volatile unsigned int DMACConfiguration
volatile unsigned int DMACEnbldChns
volatile unsigned int DMACIntErrClr
volatile unsigned int DMACIntErrorStatus
volatile unsigned int DMACIntStatus
volatile unsigned int DMACIntTCClear
volatile unsigned int DMACIntTCStatus
volatile unsigned int DMACITCR
volatile unsigned int DMACITOP[3]
volatile unsigned int DMACPCellID[4]
volatile unsigned int DMACPeriphID[4]
volatile unsigned int DMACRawIntErrorStatus
volatile unsigned int DMACRawIntTCStatus
volatile unsigned int DMACSoftBReq
volatile unsigned int DMACSoftLBReq
volatile unsigned int DMACSoftLSReq
volatile unsigned int DMACSoftSReq
volatile unsigned int DMACSync
unsigned int reserved1[50]
unsigned int reserved2[195]
unsigned int reserved3[693]

◆ DMAC_LLI

struct DMAC_LLI
成员变量
unsigned int Control
unsigned int DestAddr
unsigned int NextLLI
unsigned int SrcAddr

◆ IISDMAChanx_TypeDef

struct IISDMAChanx_TypeDef
成员变量
volatile unsigned int IISxDMARADDR
volatile unsigned int IISxDMARNUM
volatile unsigned int IISxDMATADDR0
volatile unsigned int IISxDMATADDR1
volatile unsigned int IISxDMATNUM0
volatile unsigned int IISxDMATNUM1

◆ IISDMA_TypeDef

struct IISDMA_TypeDef
成员变量
volatile unsigned int DMA_REQ_CLR_STATE
volatile unsigned int DMATADDR[3]
volatile unsigned int IIS_END_NUM
volatile unsigned int IIS_END_NUM_EN
volatile unsigned int IISDMACLR
volatile unsigned int IISDMACTRL
volatile unsigned int IISDMAIISCLR
volatile unsigned int IISDMAPTR
volatile unsigned int IISDMARADDR[3]
volatile unsigned int IISDMASTATE
IISDMAChanx_TypeDef IISxDMA[3]
volatile unsigned int RX_LAST_ADDR
volatile unsigned int RX_VAD_CTRL

◆ CODEC_ALC_TypeDef

struct CODEC_ALC_TypeDef
成员变量
volatile unsigned int reg40
volatile unsigned int reg41
volatile unsigned int reg42
volatile unsigned int reg43
volatile unsigned int reg44
volatile unsigned int reg45
volatile unsigned int reg46
volatile unsigned int reg47
volatile unsigned int reg48
volatile unsigned int reg49
volatile unsigned int reg4c
unsigned int resver7[2]
unsigned int resver8[3]

◆ CODEC_TypeDef

struct CODEC_TypeDef
成员变量
volatile unsigned int adc_dig_gain_reg[2]
CODEC_ALC_TypeDef alc_reg[2]
volatile unsigned int pga_gain_reg[2]
volatile unsigned int reg0
volatile unsigned int reg2
volatile unsigned int reg21
volatile unsigned int reg22
volatile unsigned int reg23
volatile unsigned int reg24
volatile unsigned int reg25
volatile unsigned int reg26
volatile unsigned int reg29
volatile unsigned int reg2a
volatile unsigned int reg2b
volatile unsigned int reg2c
volatile unsigned int reg2d
volatile unsigned int reg2e
volatile unsigned int reg2f
volatile unsigned int reg3
volatile unsigned int reg30
volatile unsigned int reg31
volatile unsigned int reg32
volatile unsigned int reg33
volatile unsigned int reg4
volatile unsigned int reg5
volatile unsigned int reg6
volatile unsigned int reg7
volatile unsigned int rega
unsigned int resver1
unsigned int resver4[22]
unsigned int resver6[12]

◆ EPWM_TypeDef

struct EPWM_TypeDef
成员变量
volatile unsigned int AQCSFRC
volatile unsigned int AQCTLA
volatile unsigned int AQCTLB
volatile unsigned int AQSFRC
volatile unsigned int CMPA
volatile unsigned int CMPB
volatile unsigned int CMPCTL
volatile unsigned int CPR1
volatile unsigned int CPR2
volatile unsigned int DBCTL
volatile unsigned int DBFED
volatile unsigned int DBRED
volatile unsigned int ETCLR
volatile unsigned int ETFLG
volatile unsigned int ETFRC
volatile unsigned int ETPS
volatile unsigned int ETSEL
volatile unsigned int PCCTL
volatile unsigned int PCDUTY
unsigned int resver1[2]
unsigned int resver2
unsigned int resver3[2]
unsigned int resver4[2]
volatile unsigned int TBCTL
volatile unsigned int TBCTR
volatile unsigned int TBPHS
volatile unsigned int TBPRD
volatile unsigned int TBSTS
volatile unsigned int TZCLR
volatile unsigned int TZCTL
volatile unsigned int TZEINT
volatile unsigned int TZFLG
volatile unsigned int TZFRC
volatile unsigned int TZSEL

◆ PVDC_TypeDef

struct PVDC_TypeDef
成员变量
volatile unsigned int PVDC_CFG_VOL
volatile unsigned int PVDC_EN
volatile unsigned int PVDC_INTR
volatile unsigned int PVDC_INTR_MASK
volatile unsigned int PVDC_INTR_RAW
volatile unsigned int PVDC_LOCK
volatile unsigned int PVDC_MAX_VAL
volatile unsigned int PVDC_TH
volatile unsigned int PVDC_TIME
volatile unsigned int PVDC_VOL

宏定义说明

◆ APB_BASE

#define APB_BASE   (0x5a5a5a5a)

◆ CODEC

#define CODEC   ((CODEC_TypeDef*)HAL_CODEC_BASE)

◆ CODEC_AD_GATE

#define CODEC_AD_GATE   (0x4001c000)

◆ CODEC_DA_GATE

#define CODEC_DA_GATE   (0x4001d000)

◆ DMAC

#define DMAC   ((DMA_TypeDef*)HAL_GDMA_BASE)

◆ DPMU

#define DPMU   ((DPMU_TypeDef*)HAL_DPMU_BASE)

◆ EPWM

#define EPWM   ((EPWM_TypeDef*)HAL_EPWM_BASE)

◆ HAL_CODEC_BASE

#define HAL_CODEC_BASE   (0x40013000)

◆ HAL_DPMU_BASE

#define HAL_DPMU_BASE   (0x40030000)

◆ HAL_DTRFLASH_BASE

#define HAL_DTRFLASH_BASE   (0x40004000)

◆ HAL_DTRFLASH_RAM_BASE

#define HAL_DTRFLASH_RAM_BASE   (0x45454545)

◆ HAL_EFUSE_BASE

#define HAL_EFUSE_BASE   (0x40033000)

◆ HAL_EPWM_BASE

#define HAL_EPWM_BASE   (0x40007000)

◆ HAL_GDMA_BASE

#define HAL_GDMA_BASE   (0x40001000)

◆ HAL_IIC0_BASE

#define HAL_IIC0_BASE   (0x40011000)

◆ HAL_IIS0_BASE

#define HAL_IIS0_BASE   (0x40025000)

◆ HAL_IIS1_BASE

#define HAL_IIS1_BASE   (0x40026000)

◆ HAL_IISDMA0_BASE

#define HAL_IISDMA0_BASE   (0x40003000)

◆ HAL_IWDG_BASE

#define HAL_IWDG_BASE   (0x40032000)

◆ HAL_NPU_BASE

#define HAL_NPU_BASE   (0x40006000)

◆ HAL_PA_BASE

#define HAL_PA_BASE   (0x40020000)

◆ HAL_PB_BASE

#define HAL_PB_BASE   (0x40021000)

◆ HAL_PC_BASE

#define HAL_PC_BASE   (0x40031000)

◆ HAL_PVDC_BASE

#define HAL_PVDC_BASE   (0x40034000)

◆ HAL_PWM0_BASE

#define HAL_PWM0_BASE   (0x40014000)

◆ HAL_PWM1_BASE

#define HAL_PWM1_BASE   (0x40015000)

◆ HAL_PWM2_BASE

#define HAL_PWM2_BASE   (0x40016000)

◆ HAL_PWM3_BASE

#define HAL_PWM3_BASE   (0x40017000)

◆ HAL_SCU_BASE

#define HAL_SCU_BASE   (0x40000000)

◆ HAL_TIMER0_BASE

#define HAL_TIMER0_BASE   (0x40018000)

◆ HAL_TIMER1_BASE

#define HAL_TIMER1_BASE   (0x40019000)

◆ HAL_UART0_BASE

#define HAL_UART0_BASE   (0x40022000)

◆ HAL_UART1_BASE

#define HAL_UART1_BASE   (0x40023000)

◆ HAL_UART2_BASE

#define HAL_UART2_BASE   (0x40024000)

◆ IIS1_RX_GATE

#define IIS1_RX_GATE   (0x40029000)

◆ IIS1_TX_GATE

#define IIS1_TX_GATE   (0x4002A000)

◆ IISDMA0

#define IISDMA0   ((IISDMA_TypeDef*)HAL_IISDMA0_BASE)

◆ IPCORE_BASE

#define IPCORE_BASE   (0xa6a6a6a6)

◆ IRQn_MAX_NUMBER

#define IRQn_MAX_NUMBER   (51)

◆ IWDG_CPU0_HALT_GATE

#define IWDG_CPU0_HALT_GATE   (0x40036000)

◆ IWDG_CPU1_HALT_GATE

#define IWDG_CPU1_HALT_GATE   (0x40037000)

◆ IWDG_OSCCLK_BASE

#define IWDG_OSCCLK_BASE   (0x4003c000)

◆ IWDG_RCCLK_BASE

#define IWDG_RCCLK_BASE   (0x4003b000)

◆ PLL_BASE

#define PLL_BASE   (0x40038000)

◆ PVDC

#define PVDC   ((PVDC_TypeDef*)HAL_PVDC_BASE)

◆ SCU

#define SCU   ((SCU_TypeDef*)HAL_SCU_BASE)

◆ SPI0FIFO_BASE

#define SPI0FIFO_BASE   (0x60000000)

◆ SYSTICK_BASE

#define SYSTICK_BASE   (0x77777777)

◆ TEST_CLK_BASE

#define TEST_CLK_BASE   (0x40039000)

◆ TEST_CLK_BASE1

#define TEST_CLK_BASE1   (0x4003a000)

◆ UART0

#define UART0   ((UART_TypeDef*)HAL_UART0_BASE)

◆ UART0FIFO_BASE

#define UART0FIFO_BASE   (0x61000000)

◆ UART1

#define UART1   ((UART_TypeDef*)HAL_UART1_BASE)

◆ UART1FIFO_BASE

#define UART1FIFO_BASE   (0x62000000)

◆ UART2

#define UART2   ((UART_TypeDef*)HAL_UART2_BASE)

◆ UART2FIFO_BASE

#define UART2FIFO_BASE   (0x63000000)

类型定义说明

◆ IRQn_Type

typedef enum IRQn IRQn_Type

枚举类型说明

◆ Ext_Num

enum Ext_Num
枚举值
EXT0 
EXT1 

◆ IRQn

enum IRQn
枚举值
MSIP_IRQn 
MTIP_IRQ 
SCU_IRQn 
NPU_IRQn 
EPWM_IRQn 
DMA_IRQn 
TIMER0_IRQn 
TIMER1_IRQn 
IIC0_IRQn 
PA_IRQn 
PB_IRQn 
UART0_IRQn 
UART1_IRQn 
UART2_IRQn 
IIS0_IRQn 
IIS1_IRQn 
IIS_DMA_IRQn 
ALC_TIMEOUT_IRQn 
DTR_IRQn 
V11_OK_IRQn 
VDT_IRQn 
EXT0_IRQn 
EXT1_IRQn 
IWDG_IRQn 
PVDC_IRQn 
EFUSE_IRQn 
PC_IRQn 
制作者   doxygen 1.8.14