CI130X SDK API手册  2.2.0
本手册用于描述CI130X SDK各个组件和驱动API
宏定义 | 函数
es8388.c 文件参考

为ES8388封装的驱动程序 更多...

#include "sdk_default_config.h"
#include "ci130x_iic.h"
#include "ci130x_iisdma.h"
#include "es8388.h"
#include <stdint.h>
#include <string.h>
#include "ci_log.h"
#include "ci130x_system.h"
#include "platform_config.h"

宏定义

#define ES8388_CONTROL1   (0x00)
 
#define ES8388_CONTROL2   (0x01)
 
#define ES8388_CHIPPOWER   (0x02)
 
#define ES8388_ADCPOWER   (0x03)
 
#define ES8388_DACPOWER   (0x04)
 
#define ES8388_CHIPLOPOW1   (0x05)
 
#define ES8388_CHIPLOPOW2   (0x06)
 
#define ES8388_ANAVOLMANAG   (0x07)
 
#define ES8388_MASTERMODE   (0x08)
 
#define ES8388_ADCCONTROL1   (0x09)
 
#define ES8388_ADCCONTROL2   (0x0a)
 
#define ES8388_ADCCONTROL3   (0x0b)
 
#define ES8388_ADCCONTROL4   (0x0c)
 
#define ES8388_ADCCONTROL5   (0x0d)
 
#define ES8388_ADCCONTROL6   (0x0e)
 
#define ES8388_ADCCONTROL7   (0x0f)
 
#define ES8388_ADCCONTROL8   (0x10)
 
#define ES8388_ADCCONTROL9   (0x11)
 
#define ES8388_ADCCONTROL10   (0x12)
 
#define ES8388_ADCCONTROL11   (0x13)
 
#define ES8388_ADCCONTROL12   (0x14)
 
#define ES8388_ADCCONTROL13   (0x15)
 
#define ES8388_ADCCONTROL14   (0x16)
 
#define ES8388_DACCONTROL1   (0x17)
 
#define ES8388_DACCONTROL2   (0x18)
 
#define ES8388_DACCONTROL3   (0x19)
 
#define ES8388_DACCONTROL4   (0x1a)
 
#define ES8388_DACCONTROL5   (0x1b)
 
#define ES8388_DACCONTROL6   (0x1c)
 
#define ES8388_DACCONTROL7   (0x1d)
 
#define ES8388_DACCONTROL8   (0x1e)
 
#define ES8388_DACCONTROL9   (0x1f)
 
#define ES8388_DACCONTROL10   (0x20)
 
#define ES8388_DACCONTROL11   (0x21)
 
#define ES8388_DACCONTROL12   (0x22)
 
#define ES8388_DACCONTROL13   (0x23)
 
#define ES8388_DACCONTROL14   (0x24)
 
#define ES8388_DACCONTROL15   (0x25)
 
#define ES8388_DACCONTROL16   (0x26)
 
#define ES8388_DACCONTROL17   (0x27)
 
#define ES8388_DACCONTROL18   (0x28)
 
#define ES8388_DACCONTROL19   (0x29)
 
#define ES8388_DACCONTROL20   (0x2a)
 
#define ES8388_DACCONTROL21   (0x2b)
 
#define ES8388_DACCONTROL22   (0x2c)
 
#define ES8388_DACCONTROL23   (0x2d)
 
#define ES8388_DACCONTROL24   (0x2e)
 
#define ES8388_DACCONTROL25   (0x2f)
 
#define ES8388_DACCONTROL26   (0x30)
 
#define ES8388_DACCONTROL27   (0x31)
 
#define ES8388_DACCONTROL28   (0x32)
 
#define ES8388_DACCONTROL29   (0x33)
 
#define ES8388_DACCONTROL30   (0x34)
 
#define ES8388_LADC_VOL   ES8388_ADCCONTROL8
 
#define ES8388_RADC_VOL   ES8388_ADCCONTROL9
 
#define ES8388_LDAC_VOL   ES8388_DACCONTROL4
 
#define ES8388_RDAC_VOL   ES8388_DACCONTROL5
 
#define ES8388_LOUT1_VOL   ES8388_DACCONTROL24
 
#define ES8388_ROUT1_VOL   ES8388_DACCONTROL25
 
#define ES8388_LOUT2_VOL   ES8388_DACCONTROL26
 
#define ES8388_ROUT2_VOL   ES8388_DACCONTROL27
 
#define ES8388_ADC_MUTE   ES8388_ADCCONTROL7
 
#define ES8388_DAC_MUTE   ES8388_DACCONTROL3
 
#define ES8388_IFACE   ES8388_MASTERMODE
 
#define ES8388_ADC_IFACE   ES8388_ADCCONTROL4
 
#define ES8388_DAC_IFACE   ES8388_DACCONTROL1
 
#define ES8388_DAC_SRATE   ES8388_DACCONTROL2
 
#define ADCMCLK_AS_MASTER_CLOCK   (0x0<<5)
 
#define DACMCLK_AS_MASTER_CLOCK   (0x1<<5)
 
#define ADC_FS_DIF_FROM_DAC_FS   (0x0<<4)
 
#define ADC_FS_SAME_AS_DAC_FS   (0x1<<4)
 
#define DISABLE_REFERENCE   (0x0<<2)
 
#define ENABLE_REFERENCE   (0x1<<2)
 
#define VMID_DISABLE   (0x0<<0)
 
#define DIVIDER_50K   (0x1<<0)
 
#define DIVIDER_500K   (0x2<<0)
 
#define DIVIDER_5K   (0x3<<0)
 
#define LINPUT1   (0x0<<6)
 
#define LINPUT2   (0x1<<6)
 
#define DIFFERENTIAL_L_CHA   (0x3<<6)
 
#define RINPUT1   (0x0<<4)
 
#define RINPUT2   (0x1<<4)
 
#define DIFFERENTIAL_R_CHA   (0x3<<4)
 
#define USE_ONE_DSL_REG11_BIT7   (0x0<<3)
 
#define USE_DSL_REG11_BIT7_DSR_REG10_BIT2   (0x1<<3)
 
#define DSR_LINPUT1_RINPUT1   (0x0<<2)
 
#define DSR_LINPUT2_RINPUT2   (0x1<<2)
 
#define DSL_LINPUT1_RINPUT1   (0x0<<7)
 
#define DSL_LINPUT2_RINPUT2   (0x1<<7)
 
#define MONOMIX_STEREO   (0x0<<3)
 
#define ANALOG_MONO_MIX_TO_LEFT   (0x1<<3)
 
#define ANALOG_MONO_MIX_TO_RIGHT   (0x2<<3)
 
#define ASDOUT_IS_ADC_NORMAL_OUTPUT   (0x0<<2)
 
#define ASDOUT_TRI_STATED   (0x1<<2)
 
#define ADC_LDATA_LADC_RDATA_RADC   (0x0<<6)
 
#define ADC_LDATA_LADC_RDATA_LADC   (0x1<<6)
 
#define ADC_LDATA_RADC_RDATA_RADC   (0x2<<6)
 
#define ADC_LDATA_RADC_RDATA_LADC   (0x3<<6)
 
#define ADC_DATA_NORMAL_POLARITY   (0<<5)
 
#define ADC_DATA_INVERTED_POLARITY   (1<<5)
 
#define ADC_DATA_2ND_BCLK   (0<<5)
 
#define ADC_DATA_1ST_BCLK   (1<<5)
 
#define FS_SINGLE_SPEED   (0x0<<5)
 
#define FS_DOUBLE_SPEED   (0x1<<5)
 
#define FS_RATIO_128   (0x0<<0)
 
#define FS_RATIO_192   (0x1<<0)
 
#define FS_RATIO_256   (0x2<<0)
 
#define FS_RATIO_384   (0x3<<0)
 
#define FS_RATIO_512   (0x4<<0)
 
#define FS_RATIO_576   (0x5<<0)
 
#define FS_RATIO_768   (0x6<<0)
 
#define FS_RATIO_1024   (0x7<<0)
 
#define FS_RATIO_1152   (0x8<<0)
 
#define FS_RATIO_1408   (0x9<<0)
 
#define FS_RATIO_1536   (0xa<<0)
 
#define FS_RATIO_2112   (0xb<<0)
 
#define FS_RATIO_2304   (0xc<<0)
 
#define FS_RATIO_125   (0x10<<0)
 
#define FS_RATIO_136   (0x11<<0)
 
#define FS_RATIO_250   (0x12<<0)
 
#define FS_RATIO_272   (0x13<<0)
 
#define FS_RATIO_375   (0x14<<0)
 
#define FS_RATIO_500   (0x15<<0)
 
#define FS_RATIO_544   (0x16<<0)
 
#define FS_RATIO_750   (0x17<<0)
 
#define FS_RATIO_1000   (0x18<<0)
 
#define FS_RATIO_1088   (0x1a<<0)
 
#define FS_RATIO_1496   (0x1b<<0)
 
#define FS_RATIO_1500   (0x1c<<0)
 
#define ADC_HPFL_ENABLE   (1<<5)
 
#define ADC_HPFL_DISABLE   (0<<5)
 
#define ADC_HPFR_ENABLE   (1<<4)
 
#define ADC_HPFR_DISABLE   (0<<4)
 
#define ADC_RAMPRATE_4LRCK   (0<<6)
 
#define ADC_RAMPRATE_8LRCK   (1<<6)
 
#define ADC_RAMPRATE_16LRCK   (2<<6)
 
#define ADC_RAMPRATE_32LRCK   (3<<6)
 
#define ADC_SOFTRAMP_ENABLE   (1<<5)
 
#define ADC_SOFTRAMP_DISABLE   (0<<5)
 
#define ADC_MUTE_ENABLE   (1<<2)
 
#define ADC_MUTE_DISABLE   (0<<2)
 
#define ALC_HOLDTIME_0MS   (0<<0)
 
#define ALC_HOLDTIME_2_67MS   (1<<0)
 
#define ALC_HOLDTIME_5_33MS   (2<<0)
 
#define ALC_HOLDTIME_10_5MS   (3<<0)
 
#define ALC_HOLDTIME_21MS   (4<<0)
 
#define ALC_HOLDTIME_42MS   (5<<0)
 
#define ALC_HOLDTIME_85MS   (6<<0)
 
#define ALC_HOLDTIME_170MS   (7<<0)
 
#define ALC_HOLDTIME_340MS   (8<<0)
 
#define ALC_HOLDTIME_680MS   (9<<0)
 
#define ALC_HOLDTIME_01360MS   (10<<0)
 
#define ALC_DECAYTIME_0_41MS   (0<<4)
 
#define ALC_DECAYTIME_0_82MS   (1<<4)
 
#define ALC_DECAYTIME_1_64MS   (2<<4)
 
#define ALC_DECAYTIME_3_28MS   (3<<4)
 
#define ALC_DECAYTIME_6_56MS   (4<<4)
 
#define ALC_DECAYTIME_13_12MS   (5<<4)
 
#define ALC_DECAYTIME_26_24MS   (6<<4)
 
#define ALC_DECAYTIME_52_5MS   (7<<4)
 
#define ALC_DECAYTIME_105MS   (8<<4)
 
#define ALC_DECAYTIME_210MS   (9<<4)
 
#define ALC_DECAYTIME_420MS   (10<<4)
 
#define ALC_ATTACKTIME_0_104MS   (0<<0)
 
#define ALC_ATTACKTIME_0_208MS   (1<<0)
 
#define ALC_ATTACKTIME_0_416MS   (2<<0)
 
#define ALC_ATTACKTIME_0_832MS   (3<<0)
 
#define ALC_ATTACKTIME_1_664MS   (4<<0)
 
#define ALC_ATTACKTIME_3_328MS   (5<<0)
 
#define ALC_ATTACKTIME_6_65MS   (6<<0)
 
#define ALC_ATTACKTIME_13_3MS   (7<<0)
 
#define ALC_ATTACKTIME_26_6MS   (8<<0)
 
#define ALC_ATTACKTIME_53_2MS   (9<<0)
 
#define ALC_ATTACKTIME_106MS   (10<<0)
 
#define ALC_NORMAL_MODE   (0<<7)
 
#define ALC_LIMITER_MODE   (1<<7)
 
#define ALC_ZERO_CROSS_DISABLE   (0<<6)
 
#define ALC_ZERO_CROSS_ENABLE   (1<<6)
 
#define ALC_ZERO_CROSS_TIMEOUT_DISABLE   (0<<5)
 
#define ALC_ZERO_CROSS_TIMEOUT_ENABLE   (1<<5)
 
#define PGA_GAIN_HELD_CONSTANT   (0x0<<1)
 
#define MUTE_ADC_OUTPUT   (0x1<<1)
 
#define NOISE_GATE_DISABLE   (0x0<<0)
 
#define NOISE_GATE_ENABLE   (0x1<<0)
 
#define DAC_LRSWAP_DISABLE   (0<<7)
 
#define DAC_LRSWAP_ENABLE   (1<<7)
 
#define DAC_DATA_NORMAL_POLARITY   (0<<6)
 
#define DAC_DATA_INVERTED_POLARITY   (1<<6)
 
#define DAC_DATA_2ND_BCLK   (0<<6)
 
#define DAC_DATA_1ST_BCLK   (1<<6)
 
#define DAC_DEEMPHASISMODE_DISABLE   (0<<6)
 
#define DAC_DEEMPHASISMODE_32K   (1<<6)
 
#define DAC_DEEMPHASISMODE_44_1K   (2<<6)
 
#define DAC_DEEMPHASISMODE_48K   (3<<6)
 
#define DAC_L_NO_PHASE_INVERSION   (0<<5)
 
#define DAC_L_180_PHASE_INVERSION   (1<<5)
 
#define DAC_R_NO_PHASE_INVERSION   (0<<4)
 
#define DAC_R_180_PHASE_INVERSION   (1<<4)
 
#define DAC_ZERO_OUTPUT_L_DISABLE   (0<<7)
 
#define DAC_ZERO_OUTPUT_L_ENABLE   (1<<7)
 
#define DAC_ZERO_OUTPUT_R_DISABLE   (0<<6)
 
#define DAC_ZERO_OUTPUT_R_ENABLE   (1<<6)
 
#define DAC_NO_MERGE   (0<<5)
 
#define DAC_L_R_MERGE   (1<<5)
 
#define DAC_SE_STRENGTH_0   (0<<2)
 
#define DAC_SE_STRENGTH_1   (1<<2)
 
#define DAC_SE_STRENGTH_2   (2<<2)
 
#define DAC_SE_STRENGTH_3   (3<<2)
 
#define DAC_SE_STRENGTH_4   (4<<2)
 
#define DAC_SE_STRENGTH_5   (5<<2)
 
#define DAC_SE_STRENGTH_6   (6<<2)
 
#define DAC_SE_STRENGTH_7   (7<<2)
 
#define DAC_VPP_3_5V   (0<<0)
 
#define DAC_VPP_4V   (1<<0)
 
#define DAC_VPP_3V   (2<<0)
 
#define DAC_VPP_2_5V   (3<<0)
 
#define LMIXSEL_LIN1   (0<<3)
 
#define LMIXSEL_LIN2   (1<<3)
 
#define LMIXSEL_LEFT_ADC   (3<<3)
 
#define RMIXSEL_RIN1   (0<<0)
 
#define RMIXSEL_RIN2   (1<<0)
 
#define RMIXSEL_RIGHT_ADC   (3<<0)
 
#define L_DAC_2_L_MIXER_DISABLE   (0<<7)
 
#define L_DAC_2_L_MIXER_ENABLE   (1<<7)
 
#define LIN_2_L_MIXER_DISABLE   (0<<6)
 
#define LIN_2_L_MIXER_ENABLE   (1<<6)
 
#define LIN_2_L_MIXER_GAIN_6dB   (0<<3)
 
#define LIN_2_L_MIXER_GAIN_3dB   (1<<3)
 
#define LIN_2_L_MIXER_GAIN_0dB   (2<<3)
 
#define LIN_2_L_MIXER_GAIN__3dB   (3<<3)
 
#define LIN_2_L_MIXER_GAIN__6dB   (4<<3)
 
#define LIN_2_L_MIXER_GAIN__9dB   (5<<3)
 
#define LIN_2_L_MIXER_GAIN__12dB   (6<<3)
 
#define LIN_2_L_MIXER_GAIN__15dB   (7<<3)
 
#define R_DAC_2_R_MIXER_DISABLE   (0<<7)
 
#define R_DAC_2_R_MIXER_ENABLE   (1<<7)
 
#define RIN_2_R_MIXER_DISABLE   (0<<6)
 
#define RIN_2_R_MIXER_ENABLE   (1<<6)
 
#define RIN_2_R_MIXER_GAIN_6dB   (0<<3)
 
#define RIN_2_R_MIXER_GAIN_3dB   (1<<3)
 
#define RIN_2_R_MIXER_GAIN_0dB   (2<<3)
 
#define RIN_2_R_MIXER_GAIN__3dB   (3<<3)
 
#define RIN_2_R_MIXER_GAIN__6dB   (4<<3)
 
#define RIN_2_R_MIXER_GAIN__9dB   (5<<3)
 
#define RIN_2_R_MIXER_GAIN__12dB   (6<<3)
 
#define RIN_2_R_MIXER_GAIN__15dB   (7<<3)
 
#define DAC_ADC_LRC_SEPARATE   (0<<7)
 
#define DAC_ADC_LRC_SAME   (1<<7)
 
#define USE_DAC_LRCK   (0<<6)
 
#define USE_ADC_LRCK   (1<<6)
 
#define OFFSET_DISABLE   (0<<5)
 
#define OFFSET_ENABLE   (1<<5)
 
#define MCLK_INPUT_FROM_PAD_ENABLE   (0<<4)
 
#define MCLK_INPUT_FROM_PAD_DISABLE   (1<<4)
 
#define ADC_DLL_NORMOL   (0<<3)
 
#define ADC_DLL_POWER_DOWN   (1<<3)
 
#define DAC_DLL_NORMAL   (0<<2)
 
#define DAC_DLL_POWER_DOWN   (1<<2)
 
#define VROI_1_5K   (0<<4)
 
#define VROI_40K   (1<<4)
 

函数

void es8388_i2c_init (es8388_num_sel_t num_8388)
 es8388使用的I2C初始化 更多...
 
static void I2C_WriteEs8388Data (es8388_num_sel_t num_8388, unsigned int regaddr, char val)
 为8388写入一个字节数据 更多...
 
static int I2C_ReadEs8388Data (es8388_num_sel_t num_8388, unsigned int regaddr)
 读取8388某个寄存器的值 更多...
 
int32_t ES8388_reset (es8388_num_sel_t num_8388)
 设置8388 复位 更多...
 
int32_t ES8388_reset_release (es8388_num_sel_t num_8388)
 设置8388 解除复位 更多...
 
int32_t ES8388_chip_control_config (es8388_num_sel_t num_8388, uint32_t dacmclk, uint32_t samefs, uint32_t ref, uint32_t divider)
 设置8388 chipcontrol的配置 更多...
 
int32_t ES8388_mastermode_config (es8388_num_sel_t num_8388, es8388_mode_sel_t mode)
 设置8388 mastermode寄存器的值，使用基本固定，全部都是0x00 更多...
 
int32_t ES8388_ADC_mic_amplify_set (es8388_num_sel_t num_8388, es8388_mic_amp_t l_amp, es8388_mic_amp_t r_amp)
 设置8388 MIC增益的设置 更多...
 
static int32_t ES8388_input_channal_config (es8388_num_sel_t num_8388, es8388_input_cha_t *InChaType)
 8388的输入线路选择 更多...
 
int32_t ES8388_ADC_data_format_set (es8388_num_sel_t num_8388, es8388_adc_data_len_t data_length, es8388_adc_data_format_t data_format)
 ADC的数据格式设置 更多...
 
int32_t ES8388_ADC_oversample_config (es8388_num_sel_t num_8388, uint32_t fs_mode, uint32_t fs_ratio)
 ADC过采样率设置 更多...
 
int32_t ES8388_ADC_invl_config (es8388_num_sel_t num_8388, es8388_adc_inv_sel_t gate_l, es8388_adc_inv_sel_t gate_r)
 设置8388 ADC 数据极性反转 更多...
 
int32_t ES8388_ADC_HPF_config (es8388_num_sel_t num_8388, uint32_t gate_l, uint32_t gate_r)
 设置8388 ADC 高通滤波器的开关（8388的高通滤波器的截止频率大概为6.7Hz） 更多...
 
int32_t ES8388_ADC_soft_ramp_config (es8388_num_sel_t num_8388, uint32_t gate, uint32_t x_lrck)
 设置8388 ADC 的softramp设置 更多...
 
int32_t ES8388_ADC_mute_config (es8388_num_sel_t num_8388, uint32_t gate)
 设置8388 ADC mute的开关 更多...
 
int32_t ES8388_ADC_vol_config (es8388_num_sel_t num_8388, float adc_vol_l, float adc_vol_r)
 配置8388的ADCVOL的值 更多...
 
int32_t ES8388_ALC_config (es8388_num_sel_t num_8388, es8388_alc_config_t *ALC_str, es8388_alc_cha_gate_t ALC_gate)
 配置8388的ALC 更多...
 
void ES8388_alc_gate (es8388_num_sel_t num_8388, es8388_alc_cha_gate_t ALC_gate)
 
void ES8388_alc_max_gain_set (es8388_num_sel_t num_8388, es8388_alc_maxgain_t max_gain)
 
static int32_t ES8388_noise_gate_config (es8388_num_sel_t num_8388, float threshold, uint32_t type, uint32_t gate)
 设置8388 ALC noisegate设置 更多...
 
int32_t ES8388_DAC_data_format_set (es8388_num_sel_t num_8388, es8388_dac_data_len_t data_length, es8388_dac_data_format_t data_format)
 设置8388 DAC数据格式设置 更多...
 
int32_t ES8388_DAC_oversample_config (es8388_num_sel_t num_8388, uint32_t fs_mode, uint32_t fs_ratio)
 DAC 过采样设置 更多...
 
int32_t ES8388_DAC_vol_config (es8388_num_sel_t num_8388, float DAC_vol_l, float DAC_vol_r)
 配置8388的DACVOL的值 更多...
 
int32_t ES8388_DAC_deemphasismode_config (es8388_num_sel_t num_8388, uint32_t mode)
 DAC DEEMPHASISMODE的设置(去加重模式设置) 更多...
 
int32_t ES8388_DAC_phase_inversion_config (es8388_num_sel_t num_8388, uint32_t phase_l, uint32_t phase_r)
 DAC 左右通道相位180度翻转开关 更多...
 
int32_t ES8388_DAC_output_zero_config (es8388_num_sel_t num_8388, uint32_t zero_l, uint32_t zero_r)
 DAC 左右通道输出归零选择 更多...
 
int32_t ES8388_DAC_mono_config (es8388_num_sel_t num_8388, uint32_t merge_en)
 左右通道是否merge（如果merge，左右通道的和的一半通过左右通道输出） 更多...
 
int32_t ES8388_DAC_SE_add_vpp_config (es8388_num_sel_t num_8388, uint32_t se, uint32_t vpp)
 设置8388 DAC 音能和Vpp幅值上限设置 更多...
 
int32_t ES8388_mixsel (es8388_num_sel_t num_8388, uint32_t l_sel, uint32_t r_sel)
 左右通道mix选择 更多...
 
int32_t ES8388_left_mixer_config (es8388_num_sel_t num_8388, uint32_t ld2lo, uint32_t li2lo, uint32_t li2lovol)
 左通道mixer配置 更多...
 
int32_t ES8388_right_mixer_config (es8388_num_sel_t num_8388, uint32_t rd2ro, uint32_t ri2ro, uint32_t ri2rovol)
 4通道mixer配置 更多...
 
int32_t ES8388_dac_clk_config (es8388_num_sel_t num_8388, uint32_t slrck, uint32_t lrck_sel, uint32_t offset, uint32_t mclk, uint32_t adc_dll, uint32_t dac_dll)
 DAC的clk方面的一些配置 更多...
 
int32_t ES8388_dac_offset_config (es8388_num_sel_t num_8388, uint32_t offset)
 offset大小的设置 更多...
 
int32_t ES8388_vref_resistance_config (es8388_num_sel_t num_8388, uint32_t vroi)
 VREF to analog output resistance电阻大小选择 更多...
 
int32_t ES8388_dac_vol_set (es8388_num_sel_t num_8388, int32_t l1vol, int32_t r1vol, int32_t l2vol, int32_t r2vol)
 DAC四个通道的声音大小的设置 更多...
 
int32_t ES8388_play_init (es8388_num_sel_t num_8388)
 根据8388的编号初始化8388 更多...
 
void ES8388_DAC_power (es8388_num_sel_t num_8388, es8388_cha_sel_t cha, FunctionalState cmd)
 各个通道DAC电源的开关 更多...
 
void ES8388_DAC_mute (es8388_num_sel_t num_8388, FunctionalState cmd)
 DAC mute开关 更多...
 
void ES8388_aec_setting (es8388_num_sel_t num_8388)
 在AEC的情况下8388的配置（参照一代工程） 更多...
 

详细描述

为ES8388封装的驱动程序

版本
0.1
日期
2019-03-28
版权所有
Copyright (c) 2019 Chipintelli Technology Co., Ltd.

宏定义说明

◆ ADC_DATA_1ST_BCLK

#define ADC_DATA_1ST_BCLK   (1<<5)

◆ ADC_DATA_2ND_BCLK

#define ADC_DATA_2ND_BCLK   (0<<5)

◆ ADC_DATA_INVERTED_POLARITY

#define ADC_DATA_INVERTED_POLARITY   (1<<5)

◆ ADC_DATA_NORMAL_POLARITY

#define ADC_DATA_NORMAL_POLARITY   (0<<5)

◆ ADC_DLL_NORMOL

#define ADC_DLL_NORMOL   (0<<3)

◆ ADC_DLL_POWER_DOWN

#define ADC_DLL_POWER_DOWN   (1<<3)

◆ ADC_FS_DIF_FROM_DAC_FS

#define ADC_FS_DIF_FROM_DAC_FS   (0x0<<4)

◆ ADC_FS_SAME_AS_DAC_FS

#define ADC_FS_SAME_AS_DAC_FS   (0x1<<4)

◆ ADC_HPFL_DISABLE

#define ADC_HPFL_DISABLE   (0<<5)

◆ ADC_HPFL_ENABLE

#define ADC_HPFL_ENABLE   (1<<5)

◆ ADC_HPFR_DISABLE

#define ADC_HPFR_DISABLE   (0<<4)

◆ ADC_HPFR_ENABLE

#define ADC_HPFR_ENABLE   (1<<4)

◆ ADC_LDATA_LADC_RDATA_LADC

#define ADC_LDATA_LADC_RDATA_LADC   (0x1<<6)

◆ ADC_LDATA_LADC_RDATA_RADC

#define ADC_LDATA_LADC_RDATA_RADC   (0x0<<6)

◆ ADC_LDATA_RADC_RDATA_LADC

#define ADC_LDATA_RADC_RDATA_LADC   (0x3<<6)

◆ ADC_LDATA_RADC_RDATA_RADC

#define ADC_LDATA_RADC_RDATA_RADC   (0x2<<6)

◆ ADC_MUTE_DISABLE

#define ADC_MUTE_DISABLE   (0<<2)

◆ ADC_MUTE_ENABLE

#define ADC_MUTE_ENABLE   (1<<2)

◆ ADC_RAMPRATE_16LRCK

#define ADC_RAMPRATE_16LRCK   (2<<6)

◆ ADC_RAMPRATE_32LRCK

#define ADC_RAMPRATE_32LRCK   (3<<6)

◆ ADC_RAMPRATE_4LRCK

#define ADC_RAMPRATE_4LRCK   (0<<6)

◆ ADC_RAMPRATE_8LRCK

#define ADC_RAMPRATE_8LRCK   (1<<6)

◆ ADC_SOFTRAMP_DISABLE

#define ADC_SOFTRAMP_DISABLE   (0<<5)

◆ ADC_SOFTRAMP_ENABLE

#define ADC_SOFTRAMP_ENABLE   (1<<5)

◆ ADCMCLK_AS_MASTER_CLOCK

#define ADCMCLK_AS_MASTER_CLOCK   (0x0<<5)

◆ ALC_ATTACKTIME_0_104MS

#define ALC_ATTACKTIME_0_104MS   (0<<0)

◆ ALC_ATTACKTIME_0_208MS

#define ALC_ATTACKTIME_0_208MS   (1<<0)

◆ ALC_ATTACKTIME_0_416MS

#define ALC_ATTACKTIME_0_416MS   (2<<0)

◆ ALC_ATTACKTIME_0_832MS

#define ALC_ATTACKTIME_0_832MS   (3<<0)

◆ ALC_ATTACKTIME_106MS

#define ALC_ATTACKTIME_106MS   (10<<0)

◆ ALC_ATTACKTIME_13_3MS

#define ALC_ATTACKTIME_13_3MS   (7<<0)

◆ ALC_ATTACKTIME_1_664MS

#define ALC_ATTACKTIME_1_664MS   (4<<0)

◆ ALC_ATTACKTIME_26_6MS

#define ALC_ATTACKTIME_26_6MS   (8<<0)

◆ ALC_ATTACKTIME_3_328MS

#define ALC_ATTACKTIME_3_328MS   (5<<0)

◆ ALC_ATTACKTIME_53_2MS

#define ALC_ATTACKTIME_53_2MS   (9<<0)

◆ ALC_ATTACKTIME_6_65MS

#define ALC_ATTACKTIME_6_65MS   (6<<0)

◆ ALC_DECAYTIME_0_41MS

#define ALC_DECAYTIME_0_41MS   (0<<4)

◆ ALC_DECAYTIME_0_82MS

#define ALC_DECAYTIME_0_82MS   (1<<4)

◆ ALC_DECAYTIME_105MS

#define ALC_DECAYTIME_105MS   (8<<4)

◆ ALC_DECAYTIME_13_12MS

#define ALC_DECAYTIME_13_12MS   (5<<4)

◆ ALC_DECAYTIME_1_64MS

#define ALC_DECAYTIME_1_64MS   (2<<4)

◆ ALC_DECAYTIME_210MS

#define ALC_DECAYTIME_210MS   (9<<4)

◆ ALC_DECAYTIME_26_24MS

#define ALC_DECAYTIME_26_24MS   (6<<4)

◆ ALC_DECAYTIME_3_28MS

#define ALC_DECAYTIME_3_28MS   (3<<4)

◆ ALC_DECAYTIME_420MS

#define ALC_DECAYTIME_420MS   (10<<4)

◆ ALC_DECAYTIME_52_5MS

#define ALC_DECAYTIME_52_5MS   (7<<4)

◆ ALC_DECAYTIME_6_56MS

#define ALC_DECAYTIME_6_56MS   (4<<4)

◆ ALC_HOLDTIME_01360MS

#define ALC_HOLDTIME_01360MS   (10<<0)

◆ ALC_HOLDTIME_0MS

#define ALC_HOLDTIME_0MS   (0<<0)

◆ ALC_HOLDTIME_10_5MS

#define ALC_HOLDTIME_10_5MS   (3<<0)

◆ ALC_HOLDTIME_170MS

#define ALC_HOLDTIME_170MS   (7<<0)

◆ ALC_HOLDTIME_21MS

#define ALC_HOLDTIME_21MS   (4<<0)

◆ ALC_HOLDTIME_2_67MS

#define ALC_HOLDTIME_2_67MS   (1<<0)

◆ ALC_HOLDTIME_340MS

#define ALC_HOLDTIME_340MS   (8<<0)

◆ ALC_HOLDTIME_42MS

#define ALC_HOLDTIME_42MS   (5<<0)

◆ ALC_HOLDTIME_5_33MS

#define ALC_HOLDTIME_5_33MS   (2<<0)

◆ ALC_HOLDTIME_680MS

#define ALC_HOLDTIME_680MS   (9<<0)

◆ ALC_HOLDTIME_85MS

#define ALC_HOLDTIME_85MS   (6<<0)

◆ ALC_LIMITER_MODE

#define ALC_LIMITER_MODE   (1<<7)

◆ ALC_NORMAL_MODE

#define ALC_NORMAL_MODE   (0<<7)

◆ ALC_ZERO_CROSS_DISABLE

#define ALC_ZERO_CROSS_DISABLE   (0<<6)

◆ ALC_ZERO_CROSS_ENABLE

#define ALC_ZERO_CROSS_ENABLE   (1<<6)

◆ ALC_ZERO_CROSS_TIMEOUT_DISABLE

#define ALC_ZERO_CROSS_TIMEOUT_DISABLE   (0<<5)

◆ ALC_ZERO_CROSS_TIMEOUT_ENABLE

#define ALC_ZERO_CROSS_TIMEOUT_ENABLE   (1<<5)

◆ ANALOG_MONO_MIX_TO_LEFT

#define ANALOG_MONO_MIX_TO_LEFT   (0x1<<3)

◆ ANALOG_MONO_MIX_TO_RIGHT

#define ANALOG_MONO_MIX_TO_RIGHT   (0x2<<3)

◆ ASDOUT_IS_ADC_NORMAL_OUTPUT

#define ASDOUT_IS_ADC_NORMAL_OUTPUT   (0x0<<2)

◆ ASDOUT_TRI_STATED

#define ASDOUT_TRI_STATED   (0x1<<2)

◆ DAC_ADC_LRC_SAME

#define DAC_ADC_LRC_SAME   (1<<7)

◆ DAC_ADC_LRC_SEPARATE

#define DAC_ADC_LRC_SEPARATE   (0<<7)

◆ DAC_DATA_1ST_BCLK

#define DAC_DATA_1ST_BCLK   (1<<6)

◆ DAC_DATA_2ND_BCLK

#define DAC_DATA_2ND_BCLK   (0<<6)

◆ DAC_DATA_INVERTED_POLARITY

#define DAC_DATA_INVERTED_POLARITY   (1<<6)

◆ DAC_DATA_NORMAL_POLARITY

#define DAC_DATA_NORMAL_POLARITY   (0<<6)

◆ DAC_DEEMPHASISMODE_32K

#define DAC_DEEMPHASISMODE_32K   (1<<6)

◆ DAC_DEEMPHASISMODE_44_1K

#define DAC_DEEMPHASISMODE_44_1K   (2<<6)

◆ DAC_DEEMPHASISMODE_48K

#define DAC_DEEMPHASISMODE_48K   (3<<6)

◆ DAC_DEEMPHASISMODE_DISABLE

#define DAC_DEEMPHASISMODE_DISABLE   (0<<6)

◆ DAC_DLL_NORMAL

#define DAC_DLL_NORMAL   (0<<2)

◆ DAC_DLL_POWER_DOWN

#define DAC_DLL_POWER_DOWN   (1<<2)

◆ DAC_L_180_PHASE_INVERSION

#define DAC_L_180_PHASE_INVERSION   (1<<5)

◆ DAC_L_NO_PHASE_INVERSION

#define DAC_L_NO_PHASE_INVERSION   (0<<5)

◆ DAC_L_R_MERGE

#define DAC_L_R_MERGE   (1<<5)

◆ DAC_LRSWAP_DISABLE

#define DAC_LRSWAP_DISABLE   (0<<7)

◆ DAC_LRSWAP_ENABLE

#define DAC_LRSWAP_ENABLE   (1<<7)

◆ DAC_NO_MERGE

#define DAC_NO_MERGE   (0<<5)

◆ DAC_R_180_PHASE_INVERSION

#define DAC_R_180_PHASE_INVERSION   (1<<4)

◆ DAC_R_NO_PHASE_INVERSION

#define DAC_R_NO_PHASE_INVERSION   (0<<4)

◆ DAC_SE_STRENGTH_0

#define DAC_SE_STRENGTH_0   (0<<2)

◆ DAC_SE_STRENGTH_1

#define DAC_SE_STRENGTH_1   (1<<2)

◆ DAC_SE_STRENGTH_2

#define DAC_SE_STRENGTH_2   (2<<2)

◆ DAC_SE_STRENGTH_3

#define DAC_SE_STRENGTH_3   (3<<2)

◆ DAC_SE_STRENGTH_4

#define DAC_SE_STRENGTH_4   (4<<2)

◆ DAC_SE_STRENGTH_5

#define DAC_SE_STRENGTH_5   (5<<2)

◆ DAC_SE_STRENGTH_6

#define DAC_SE_STRENGTH_6   (6<<2)

◆ DAC_SE_STRENGTH_7

#define DAC_SE_STRENGTH_7   (7<<2)

◆ DAC_VPP_2_5V

#define DAC_VPP_2_5V   (3<<0)

◆ DAC_VPP_3_5V

#define DAC_VPP_3_5V   (0<<0)

◆ DAC_VPP_3V

#define DAC_VPP_3V   (2<<0)

◆ DAC_VPP_4V

#define DAC_VPP_4V   (1<<0)

◆ DAC_ZERO_OUTPUT_L_DISABLE

#define DAC_ZERO_OUTPUT_L_DISABLE   (0<<7)

◆ DAC_ZERO_OUTPUT_L_ENABLE

#define DAC_ZERO_OUTPUT_L_ENABLE   (1<<7)

◆ DAC_ZERO_OUTPUT_R_DISABLE

#define DAC_ZERO_OUTPUT_R_DISABLE   (0<<6)

◆ DAC_ZERO_OUTPUT_R_ENABLE

#define DAC_ZERO_OUTPUT_R_ENABLE   (1<<6)

◆ DACMCLK_AS_MASTER_CLOCK

#define DACMCLK_AS_MASTER_CLOCK   (0x1<<5)

◆ DIFFERENTIAL_L_CHA

#define DIFFERENTIAL_L_CHA   (0x3<<6)

◆ DIFFERENTIAL_R_CHA

#define DIFFERENTIAL_R_CHA   (0x3<<4)

◆ DISABLE_REFERENCE

#define DISABLE_REFERENCE   (0x0<<2)

◆ DIVIDER_500K

#define DIVIDER_500K   (0x2<<0)

◆ DIVIDER_50K

#define DIVIDER_50K   (0x1<<0)

◆ DIVIDER_5K

#define DIVIDER_5K   (0x3<<0)

◆ DSL_LINPUT1_RINPUT1

#define DSL_LINPUT1_RINPUT1   (0x0<<7)

◆ DSL_LINPUT2_RINPUT2

#define DSL_LINPUT2_RINPUT2   (0x1<<7)

◆ DSR_LINPUT1_RINPUT1

#define DSR_LINPUT1_RINPUT1   (0x0<<2)

◆ DSR_LINPUT2_RINPUT2

#define DSR_LINPUT2_RINPUT2   (0x1<<2)

◆ ENABLE_REFERENCE

#define ENABLE_REFERENCE   (0x1<<2)

◆ ES8388_ADC_IFACE

#define ES8388_ADC_IFACE   ES8388_ADCCONTROL4

◆ ES8388_ADC_MUTE

#define ES8388_ADC_MUTE   ES8388_ADCCONTROL7

◆ ES8388_ADCCONTROL1

#define ES8388_ADCCONTROL1   (0x09)

◆ ES8388_ADCCONTROL10

#define ES8388_ADCCONTROL10   (0x12)

◆ ES8388_ADCCONTROL11

#define ES8388_ADCCONTROL11   (0x13)

◆ ES8388_ADCCONTROL12

#define ES8388_ADCCONTROL12   (0x14)

◆ ES8388_ADCCONTROL13

#define ES8388_ADCCONTROL13   (0x15)

◆ ES8388_ADCCONTROL14

#define ES8388_ADCCONTROL14   (0x16)

◆ ES8388_ADCCONTROL2

#define ES8388_ADCCONTROL2   (0x0a)

◆ ES8388_ADCCONTROL3

#define ES8388_ADCCONTROL3   (0x0b)

◆ ES8388_ADCCONTROL4

#define ES8388_ADCCONTROL4   (0x0c)

◆ ES8388_ADCCONTROL5

#define ES8388_ADCCONTROL5   (0x0d)

◆ ES8388_ADCCONTROL6

#define ES8388_ADCCONTROL6   (0x0e)

◆ ES8388_ADCCONTROL7

#define ES8388_ADCCONTROL7   (0x0f)

◆ ES8388_ADCCONTROL8

#define ES8388_ADCCONTROL8   (0x10)

◆ ES8388_ADCCONTROL9

#define ES8388_ADCCONTROL9   (0x11)

◆ ES8388_ADCPOWER

#define ES8388_ADCPOWER   (0x03)

◆ ES8388_ANAVOLMANAG

#define ES8388_ANAVOLMANAG   (0x07)

◆ ES8388_CHIPLOPOW1

#define ES8388_CHIPLOPOW1   (0x05)

◆ ES8388_CHIPLOPOW2

#define ES8388_CHIPLOPOW2   (0x06)

◆ ES8388_CHIPPOWER

#define ES8388_CHIPPOWER   (0x02)

◆ ES8388_CONTROL1

#define ES8388_CONTROL1   (0x00)

◆ ES8388_CONTROL2

#define ES8388_CONTROL2   (0x01)

◆ ES8388_DAC_IFACE

#define ES8388_DAC_IFACE   ES8388_DACCONTROL1

◆ ES8388_DAC_MUTE

#define ES8388_DAC_MUTE   ES8388_DACCONTROL3

◆ ES8388_DAC_SRATE

#define ES8388_DAC_SRATE   ES8388_DACCONTROL2

◆ ES8388_DACCONTROL1

#define ES8388_DACCONTROL1   (0x17)

◆ ES8388_DACCONTROL10

#define ES8388_DACCONTROL10   (0x20)

◆ ES8388_DACCONTROL11

#define ES8388_DACCONTROL11   (0x21)

◆ ES8388_DACCONTROL12

#define ES8388_DACCONTROL12   (0x22)

◆ ES8388_DACCONTROL13

#define ES8388_DACCONTROL13   (0x23)

◆ ES8388_DACCONTROL14

#define ES8388_DACCONTROL14   (0x24)

◆ ES8388_DACCONTROL15

#define ES8388_DACCONTROL15   (0x25)

◆ ES8388_DACCONTROL16

#define ES8388_DACCONTROL16   (0x26)

◆ ES8388_DACCONTROL17

#define ES8388_DACCONTROL17   (0x27)

◆ ES8388_DACCONTROL18

#define ES8388_DACCONTROL18   (0x28)

◆ ES8388_DACCONTROL19

#define ES8388_DACCONTROL19   (0x29)

◆ ES8388_DACCONTROL2

#define ES8388_DACCONTROL2   (0x18)

◆ ES8388_DACCONTROL20

#define ES8388_DACCONTROL20   (0x2a)

◆ ES8388_DACCONTROL21

#define ES8388_DACCONTROL21   (0x2b)

◆ ES8388_DACCONTROL22

#define ES8388_DACCONTROL22   (0x2c)

◆ ES8388_DACCONTROL23

#define ES8388_DACCONTROL23   (0x2d)

◆ ES8388_DACCONTROL24

#define ES8388_DACCONTROL24   (0x2e)

◆ ES8388_DACCONTROL25

#define ES8388_DACCONTROL25   (0x2f)

◆ ES8388_DACCONTROL26

#define ES8388_DACCONTROL26   (0x30)

◆ ES8388_DACCONTROL27

#define ES8388_DACCONTROL27   (0x31)

◆ ES8388_DACCONTROL28

#define ES8388_DACCONTROL28   (0x32)

◆ ES8388_DACCONTROL29

#define ES8388_DACCONTROL29   (0x33)

◆ ES8388_DACCONTROL3

#define ES8388_DACCONTROL3   (0x19)

◆ ES8388_DACCONTROL30

#define ES8388_DACCONTROL30   (0x34)

◆ ES8388_DACCONTROL4

#define ES8388_DACCONTROL4   (0x1a)

◆ ES8388_DACCONTROL5

#define ES8388_DACCONTROL5   (0x1b)

◆ ES8388_DACCONTROL6

#define ES8388_DACCONTROL6   (0x1c)

◆ ES8388_DACCONTROL7

#define ES8388_DACCONTROL7   (0x1d)

◆ ES8388_DACCONTROL8

#define ES8388_DACCONTROL8   (0x1e)

◆ ES8388_DACCONTROL9

#define ES8388_DACCONTROL9   (0x1f)

◆ ES8388_DACPOWER

#define ES8388_DACPOWER   (0x04)

◆ ES8388_IFACE

#define ES8388_IFACE   ES8388_MASTERMODE

◆ ES8388_LADC_VOL

#define ES8388_LADC_VOL   ES8388_ADCCONTROL8

◆ ES8388_LDAC_VOL

#define ES8388_LDAC_VOL   ES8388_DACCONTROL4

◆ ES8388_LOUT1_VOL

#define ES8388_LOUT1_VOL   ES8388_DACCONTROL24

◆ ES8388_LOUT2_VOL

#define ES8388_LOUT2_VOL   ES8388_DACCONTROL26

◆ ES8388_MASTERMODE

#define ES8388_MASTERMODE   (0x08)

◆ ES8388_RADC_VOL

#define ES8388_RADC_VOL   ES8388_ADCCONTROL9

◆ ES8388_RDAC_VOL

#define ES8388_RDAC_VOL   ES8388_DACCONTROL5

◆ ES8388_ROUT1_VOL

#define ES8388_ROUT1_VOL   ES8388_DACCONTROL25

◆ ES8388_ROUT2_VOL

#define ES8388_ROUT2_VOL   ES8388_DACCONTROL27

◆ FS_DOUBLE_SPEED

#define FS_DOUBLE_SPEED   (0x1<<5)

◆ FS_RATIO_1000

#define FS_RATIO_1000   (0x18<<0)

◆ FS_RATIO_1024

#define FS_RATIO_1024   (0x7<<0)

◆ FS_RATIO_1088

#define FS_RATIO_1088   (0x1a<<0)

◆ FS_RATIO_1152

#define FS_RATIO_1152   (0x8<<0)

◆ FS_RATIO_125

#define FS_RATIO_125   (0x10<<0)

◆ FS_RATIO_128

#define FS_RATIO_128   (0x0<<0)

◆ FS_RATIO_136

#define FS_RATIO_136   (0x11<<0)

◆ FS_RATIO_1408

#define FS_RATIO_1408   (0x9<<0)

◆ FS_RATIO_1496

#define FS_RATIO_1496   (0x1b<<0)

◆ FS_RATIO_1500

#define FS_RATIO_1500   (0x1c<<0)

◆ FS_RATIO_1536

#define FS_RATIO_1536   (0xa<<0)

◆ FS_RATIO_192

#define FS_RATIO_192   (0x1<<0)

◆ FS_RATIO_2112

#define FS_RATIO_2112   (0xb<<0)

◆ FS_RATIO_2304

#define FS_RATIO_2304   (0xc<<0)

◆ FS_RATIO_250

#define FS_RATIO_250   (0x12<<0)

◆ FS_RATIO_256

#define FS_RATIO_256   (0x2<<0)

◆ FS_RATIO_272

#define FS_RATIO_272   (0x13<<0)

◆ FS_RATIO_375

#define FS_RATIO_375   (0x14<<0)

◆ FS_RATIO_384

#define FS_RATIO_384   (0x3<<0)

◆ FS_RATIO_500

#define FS_RATIO_500   (0x15<<0)

◆ FS_RATIO_512

#define FS_RATIO_512   (0x4<<0)

◆ FS_RATIO_544

#define FS_RATIO_544   (0x16<<0)

◆ FS_RATIO_576

#define FS_RATIO_576   (0x5<<0)

◆ FS_RATIO_750

#define FS_RATIO_750   (0x17<<0)

◆ FS_RATIO_768

#define FS_RATIO_768   (0x6<<0)

◆ FS_SINGLE_SPEED

#define FS_SINGLE_SPEED   (0x0<<5)

◆ L_DAC_2_L_MIXER_DISABLE

#define L_DAC_2_L_MIXER_DISABLE   (0<<7)

◆ L_DAC_2_L_MIXER_ENABLE

#define L_DAC_2_L_MIXER_ENABLE   (1<<7)

◆ LIN_2_L_MIXER_DISABLE

#define LIN_2_L_MIXER_DISABLE   (0<<6)

◆ LIN_2_L_MIXER_ENABLE

#define LIN_2_L_MIXER_ENABLE   (1<<6)

◆ LIN_2_L_MIXER_GAIN_0dB

#define LIN_2_L_MIXER_GAIN_0dB   (2<<3)

◆ LIN_2_L_MIXER_GAIN_3dB

#define LIN_2_L_MIXER_GAIN_3dB   (1<<3)

◆ LIN_2_L_MIXER_GAIN_6dB

#define LIN_2_L_MIXER_GAIN_6dB   (0<<3)

◆ LIN_2_L_MIXER_GAIN__12dB

#define LIN_2_L_MIXER_GAIN__12dB   (6<<3)

◆ LIN_2_L_MIXER_GAIN__15dB

#define LIN_2_L_MIXER_GAIN__15dB   (7<<3)

◆ LIN_2_L_MIXER_GAIN__3dB

#define LIN_2_L_MIXER_GAIN__3dB   (3<<3)

◆ LIN_2_L_MIXER_GAIN__6dB

#define LIN_2_L_MIXER_GAIN__6dB   (4<<3)

◆ LIN_2_L_MIXER_GAIN__9dB

#define LIN_2_L_MIXER_GAIN__9dB   (5<<3)

◆ LINPUT1

#define LINPUT1   (0x0<<6)

◆ LINPUT2

#define LINPUT2   (0x1<<6)

◆ LMIXSEL_LEFT_ADC

#define LMIXSEL_LEFT_ADC   (3<<3)

◆ LMIXSEL_LIN1

#define LMIXSEL_LIN1   (0<<3)

◆ LMIXSEL_LIN2

#define LMIXSEL_LIN2   (1<<3)

◆ MCLK_INPUT_FROM_PAD_DISABLE

#define MCLK_INPUT_FROM_PAD_DISABLE   (1<<4)

◆ MCLK_INPUT_FROM_PAD_ENABLE

#define MCLK_INPUT_FROM_PAD_ENABLE   (0<<4)

◆ MONOMIX_STEREO

#define MONOMIX_STEREO   (0x0<<3)

◆ MUTE_ADC_OUTPUT

#define MUTE_ADC_OUTPUT   (0x1<<1)

◆ NOISE_GATE_DISABLE

#define NOISE_GATE_DISABLE   (0x0<<0)

◆ NOISE_GATE_ENABLE

#define NOISE_GATE_ENABLE   (0x1<<0)

◆ OFFSET_DISABLE

#define OFFSET_DISABLE   (0<<5)

◆ OFFSET_ENABLE

#define OFFSET_ENABLE   (1<<5)

◆ PGA_GAIN_HELD_CONSTANT

#define PGA_GAIN_HELD_CONSTANT   (0x0<<1)

◆ R_DAC_2_R_MIXER_DISABLE

#define R_DAC_2_R_MIXER_DISABLE   (0<<7)

◆ R_DAC_2_R_MIXER_ENABLE

#define R_DAC_2_R_MIXER_ENABLE   (1<<7)

◆ RIN_2_R_MIXER_DISABLE

#define RIN_2_R_MIXER_DISABLE   (0<<6)

◆ RIN_2_R_MIXER_ENABLE

#define RIN_2_R_MIXER_ENABLE   (1<<6)

◆ RIN_2_R_MIXER_GAIN_0dB

#define RIN_2_R_MIXER_GAIN_0dB   (2<<3)

◆ RIN_2_R_MIXER_GAIN_3dB

#define RIN_2_R_MIXER_GAIN_3dB   (1<<3)

◆ RIN_2_R_MIXER_GAIN_6dB

#define RIN_2_R_MIXER_GAIN_6dB   (0<<3)

◆ RIN_2_R_MIXER_GAIN__12dB

#define RIN_2_R_MIXER_GAIN__12dB   (6<<3)

◆ RIN_2_R_MIXER_GAIN__15dB

#define RIN_2_R_MIXER_GAIN__15dB   (7<<3)

◆ RIN_2_R_MIXER_GAIN__3dB

#define RIN_2_R_MIXER_GAIN__3dB   (3<<3)

◆ RIN_2_R_MIXER_GAIN__6dB

#define RIN_2_R_MIXER_GAIN__6dB   (4<<3)

◆ RIN_2_R_MIXER_GAIN__9dB

#define RIN_2_R_MIXER_GAIN__9dB   (5<<3)

◆ RINPUT1

#define RINPUT1   (0x0<<4)

◆ RINPUT2

#define RINPUT2   (0x1<<4)

◆ RMIXSEL_RIGHT_ADC

#define RMIXSEL_RIGHT_ADC   (3<<0)

◆ RMIXSEL_RIN1

#define RMIXSEL_RIN1   (0<<0)

◆ RMIXSEL_RIN2

#define RMIXSEL_RIN2   (1<<0)

◆ USE_ADC_LRCK

#define USE_ADC_LRCK   (1<<6)

◆ USE_DAC_LRCK

#define USE_DAC_LRCK   (0<<6)

◆ USE_DSL_REG11_BIT7_DSR_REG10_BIT2

#define USE_DSL_REG11_BIT7_DSR_REG10_BIT2   (0x1<<3)

◆ USE_ONE_DSL_REG11_BIT7

#define USE_ONE_DSL_REG11_BIT7   (0x0<<3)

◆ VMID_DISABLE

#define VMID_DISABLE   (0x0<<0)

◆ VROI_1_5K

#define VROI_1_5K   (0<<4)

◆ VROI_40K

#define VROI_40K   (1<<4)

函数说明

◆ ES8388_ADC_HPF_config()

int32_t ES8388_ADC_HPF_config ( es8388_num_sel_t  num_8388,
uint32_t  gate_l,
uint32_t  gate_r 
)

设置8388 ADC 高通滤波器的开关（8388的高通滤波器的截止频率大概为6.7Hz）

参数
num_83888388编号
gate_l左通道HPF开关
gate_r右通道HPF开关
返回
int32_t 正确

◆ ES8388_ADC_mute_config()

int32_t ES8388_ADC_mute_config ( es8388_num_sel_t  num_8388,
uint32_t  gate 
)

设置8388 ADC mute的开关

参数
num_83888388编号
gateADC 静音开关
返回
int32_t 正确

◆ ES8388_ADC_oversample_config()

int32_t ES8388_ADC_oversample_config ( es8388_num_sel_t  num_8388,
uint32_t  fs_mode,
uint32_t  fs_ratio 
)

ADC过采样率设置

参数
num_83888388编号
fs_modeADC MCLK模式
fs_ratio过采样率
返回
int32_t 正确

◆ ES8388_ADC_soft_ramp_config()

int32_t ES8388_ADC_soft_ramp_config ( es8388_num_sel_t  num_8388,
uint32_t  gate,
uint32_t  x_lrck 
)

设置8388 ADC 的softramp设置

参数
num_83888388编号
gatesoftramp开关
x_lrck
返回
int32_t 正确

◆ ES8388_ADC_vol_config()

int32_t ES8388_ADC_vol_config ( es8388_num_sel_t  num_8388,
float  adc_vol_l,
float  adc_vol_r 
)

配置8388的ADCVOL的值

参数
num_83888388编号
adc_vol_l左声道数字增益，从0dB到-96dB，步进为0.5dB
adc_vol_r右声道数字增益，从0dB到-96dB，步进为0.5dB
返回
int32_t 正确

◆ ES8388_chip_control_config()

int32_t ES8388_chip_control_config ( es8388_num_sel_t  num_8388,
uint32_t  dacmclk,
uint32_t  samefs,
uint32_t  ref,
uint32_t  divider 
)

设置8388 chipcontrol的配置

参数
num_83888388编号
dacmclkDAC MCLK选择
samefs过采样设置
ref是否使能ref
divider电阻选择
返回
int32_t 正确

◆ ES8388_dac_clk_config()

int32_t ES8388_dac_clk_config ( es8388_num_sel_t  num_8388,
uint32_t  slrck,
uint32_t  lrck_sel,
uint32_t  offset,
uint32_t  mclk,
uint32_t  adc_dll,
uint32_t  dac_dll 
)

DAC的clk方面的一些配置

参数
num_83888388编号
slrcklrck选择使用相同的还是不同的
lrck_sel选择使用ADC或者DAC的LRCK
offsetoffset的开关
mclkMCLK的开关
adc_dlladc_dll的开关
dac_dlldac_dll的开关
返回
int32_t 正确

◆ ES8388_DAC_deemphasismode_config()

int32_t ES8388_DAC_deemphasismode_config ( es8388_num_sel_t  num_8388,
uint32_t  mode 
)

DAC DEEMPHASISMODE的设置(去加重模式设置)

参数
num_83888388编号
mode模式设置
返回
int32_t 正确

◆ ES8388_DAC_mono_config()

int32_t ES8388_DAC_mono_config ( es8388_num_sel_t  num_8388,
uint32_t  merge_en 
)

左右通道是否merge（如果merge，左右通道的和的一半通过左右通道输出）

参数
num_83888388编号
merge_en开关
返回
int32_t 正确

◆ ES8388_dac_offset_config()

int32_t ES8388_dac_offset_config ( es8388_num_sel_t  num_8388,
uint32_t  offset 
)

offset大小的设置

参数
num_83888388编号
offset电压偏移值
返回
int32_t 正确

◆ ES8388_DAC_output_zero_config()

int32_t ES8388_DAC_output_zero_config ( es8388_num_sel_t  num_8388,
uint32_t  zero_l,
uint32_t  zero_r 
)

DAC 左右通道输出归零选择

参数
num_83888388编号
zero_l左声道数据归零选择
zero_r右声道数据归零选择
返回
int32_t 正确

◆ ES8388_DAC_oversample_config()

int32_t ES8388_DAC_oversample_config ( es8388_num_sel_t  num_8388,
uint32_t  fs_mode,
uint32_t  fs_ratio 
)

DAC 过采样设置

参数
num_83888388编号
fs_mode过采样模式
fs_ratio过采样率设置
返回
int32_t 正确

◆ ES8388_DAC_phase_inversion_config()

int32_t ES8388_DAC_phase_inversion_config ( es8388_num_sel_t  num_8388,
uint32_t  phase_l,
uint32_t  phase_r 
)

DAC 左右通道相位180度翻转开关

参数
num_83888388编号
phase_l左声道数据是否翻转
phase_r右声道数据是否翻转
返回
int32_t 正确

◆ ES8388_DAC_SE_add_vpp_config()

int32_t ES8388_DAC_SE_add_vpp_config ( es8388_num_sel_t  num_8388,
uint32_t  se,
uint32_t  vpp 
)

设置8388 DAC 音能和Vpp幅值上限设置

参数
num_83888388编号
se8个SE_STRENGTH的宏定义
vpp基准电压设置
返回
int32_t 正确

◆ ES8388_DAC_vol_config()

int32_t ES8388_DAC_vol_config ( es8388_num_sel_t  num_8388,
float  DAC_vol_l,
float  DAC_vol_r 
)

配置8388的DACVOL的值

参数
num_83888388编号
DAC_vol_l左通道VOL值，0dB到-96dB，步进为0.5dB
DAC_vol_r右通道VOL值，0dB到-96dB，步进为0.5dB
返回
int32_t 正确

◆ es8388_i2c_init()

void es8388_i2c_init ( es8388_num_sel_t  num_8388)

es8388使用的I2C初始化

参数
num_83888388的编号

◆ ES8388_input_channal_config()

static int32_t ES8388_input_channal_config ( es8388_num_sel_t  num_8388,
es8388_input_cha_t *  InChaType 
)
static

8388的输入线路选择

参数
num_83888388编号
InChaTypeES8388_Input_Channal_TypeDef类型结构体指针
返回
int32_t 正确

◆ ES8388_left_mixer_config()

int32_t ES8388_left_mixer_config ( es8388_num_sel_t  num_8388,
uint32_t  ld2lo,
uint32_t  li2lo,
uint32_t  li2lovol 
)

左通道mixer配置

参数
num_83888388编号
ld2loleft DAC to left mixer开关
li2loLIN signal to left mixer
li2lovol增益大小
返回
int32_t 正确

◆ ES8388_mastermode_config()

int32_t ES8388_mastermode_config ( es8388_num_sel_t  num_8388,
es8388_mode_sel_t  mode 
)

设置8388 mastermode寄存器的值，使用基本固定，全部都是0x00

参数
num_83888388编号
mode8388的主从模式选择
返回
int32_t 正确

◆ ES8388_mixsel()

int32_t ES8388_mixsel ( es8388_num_sel_t  num_8388,
uint32_t  l_sel,
uint32_t  r_sel 
)

左右通道mix选择

参数
num_83888388编号
l_sel左通道数据选择
r_sel右通道数据选择
返回
int32_t 正确

◆ ES8388_noise_gate_config()

static int32_t ES8388_noise_gate_config ( es8388_num_sel_t  num_8388,
float  threshold,
uint32_t  type,
uint32_t  gate 
)
static

设置8388 ALC noisegate设置

参数
num_83888388编号
threshold噪声门限阈值（-76.5dBFS – -30dBFS）
type噪声门限模式
gate噪声门限开关
返回
int32_t 正确

◆ ES8388_reset()

int32_t ES8388_reset ( es8388_num_sel_t  num_8388)

设置8388 复位

参数
num_83888388编号
返回
int32_t 正确

◆ ES8388_reset_release()

int32_t ES8388_reset_release ( es8388_num_sel_t  num_8388)

设置8388 解除复位

参数
num_83888388编号
返回
int32_t 正确

◆ ES8388_right_mixer_config()

int32_t ES8388_right_mixer_config ( es8388_num_sel_t  num_8388,
uint32_t  rd2ro,
uint32_t  ri2ro,
uint32_t  ri2rovol 
)

4通道mixer配置

参数
num_83888388编号
rd2roreft DAC to reft mixer开关
ri2rorin signal to reft mixer
ri2rovol增益大小
返回
int32_t 正确

◆ ES8388_vref_resistance_config()

int32_t ES8388_vref_resistance_config ( es8388_num_sel_t  num_8388,
uint32_t  vroi 
)

VREF to analog output resistance电阻大小选择

参数
num_83888388编号
vroi电阻大小
返回
int32_t 正确

◆ I2C_ReadEs8388Data()

static int I2C_ReadEs8388Data ( es8388_num_sel_t  num_8388,
unsigned int  regaddr 
)
static

读取8388某个寄存器的值

参数
num_83888388编号
regaddr8388寄存器地址
返回
int 读出寄存器的值

◆ I2C_WriteEs8388Data()

static void I2C_WriteEs8388Data ( es8388_num_sel_t  num_8388,
unsigned int  regaddr,
char  val 
)
static

为8388写入一个字节数据

参数
num_83888388编号
regaddr8388寄存器地址
val需要写入的值
制作者   doxygen 1.8.14