Hardware Design

CI230X chip only needs a few devices to support various online&offline voice applications. For voice part, the chip can support dual microphone input or single microphone input plus AEC echo cancellation. The user can select the appropriate circuit according to the function, power consumption and cost requirements of the designed application scheme. The following describes the application reference circuit diagram of a single microphone input plus AEC echo cancellation scheme of the chip.

Application reference circuit diagram

Figure H-1 Reference Circuit Diagram of CI230X Application

The above figure shows the circuit diagram of a CI230X application scheme that supports single microphone input plus AEC echo cancellation and power amplifier output. The chip can use 5V direct power supply, and users can design according to the corresponding peripheral device specifications in the figure above. If the board level online upgrade function is to be considered during schematic design, the UART0 pin can be led out to facilitate the firmware upgrade of the flash in the main chip through UART0 after the PCB board placement is completed. The PA4 (PG_EN) pin of the chip is internally pulled up. The power on defaults to the upgrade mode. After power on, the upgrade signal sent from the external UART0 port should be detected. If there is one, the upgrade should be started directly. The default boot time of the chip is extended by adding detection of upgrade mode, about 850mS; If the user has high requirements for the boot time, lead out the PA4 pin, add two 2.2K pull-down resistors to the ground, and add a test point between the two 2.2K Ω resistors. At this time, the chip is powered on in the normal mode, and the boot time is about 350mS, which can shorten the boot time. If you want to upgrade online at this time, you can externally supply high level to the intermediate test points connected by two 2.2K Ω resistors, pull up the PA4 pin, and then upgrade through UART0

The chip scheme can select differential microphone design or single ended microphone design, and the differential microphone design in the above figure is recommended. If the user has requirements for cost, the microphone part in the above figure can be modified to a single ended microphone design, which can use fewer passive devices than the differential microphone. However, this method is only recommended for applications where the microphone line length is less than 20 cm, otherwise the speech recognition effect will not be as good as the differential microphone design because the line length is too long and the anti-interference effect is not enough. The power amplifier in the above figure is of class AB, and 8002 power amplifier chip is recommended. Users can also choose the power amplifier chip according to the requirements of the scheme. If the power amplifier function is not required, this part of the circuit can also be removed to reduce the cost. If users do not use AEC echo cancellation function, they can also remove this part of the circuit to reduce costs

If the user has no special requirements for the power consumption of the scheme, it is recommended to directly use the PMU inside the chip for power supply. If there is a power consumption requirement, the external DCDC chip can be added to power the chip 1.1V to reduce the power consumption. All UART ports of the chip support 5V communication. The UART0 port in the above figure is a 3.3V signal. If 5V is to be connected, add a pull-up resistor connected to 5V around the RX and TX pins of UART0. No additional voltage conversion circuit is required

The VDDA33 and VDD33W pins of the chip are Wi Fi power supply input pins. DCDC power supply is used in the figure above. RY3408 DCDC chip is recommended. Users can also choose DCDC chip according to the requirements of the scheme. The current drive capacity of DCDC chip must be greater than 1A, and it only supplies power for Wi Fi to ensure stable Wi Fi performance

Both RSTn and EN pins of the chip can be used to reset the Wi Fi function. It is recommended to use the EN pin in the above figure when resetting. The PE2 and PE3 pins of the chip are Wi Fi firmware download serial ports by default, and the PE9 pin is Wi Fi firmware download enable port by default. When downloading Wi Fi firmware, you need to connect PE2 and PE3 pins to the serial port, pull PE9 pin to the ground, and then power on the chip to enable the chip to enter the download mode. Then you can download firmware through the download software provided by our company

The crystal specification used in the periphery of the chip is 40Mhz CL=12pF 10ppm, and 4.7pF capacitors need to be externally connected on the XIN and XOUT pins. The parameters and specifications of this crystal cannot be changed at will. Please strictly follow the design in the schematic diagram

The RFIO pin of the chip is an antenna pin, and the first level T-type matching network circuit is reserved in the figure above. Users can reserve chip side matching network and antenna side matching network circuit according to the actual stacking of PCB and antenna specification. Different PCB layers, antenna specifications and different PCBA assembly environments require separate debugging and matching of network circuits to ensure RF performance

PCB Layout Design

It is recommended to adopt a 4-layer board design. The first layer is used to place devices, the second layer maintains a complete ground plane, the third layer runs power lines and other lines, and the fourth layer maintains a complete ground plane. As shown in Figure H-2:

Figure H-2 Reference Diagram of CI230X PCB LAYOUT

Power circuit

1. Chip reference circuit VIN_ 5V is the 5V power supply input pin, and the ripple requirement is<100mV. 5V is a typical power supply voltage. If the input voltage exceeds 5.5V, the circuit may be damaged. The maximum 5V current of the chip circuit can reach 250mA (including external 4 Ω/3W speakers) in the broadcast state. According to the principle of double margin, a group of power supplies with a driving capacity of 500mA should be provided for the circuit. At the same time, a 4.7R 0805 encapsulated resistor must be connected in series to the circuit VIN_ 5V pin and TVS inside the circuit form a surge protection circuit, which cannot be deleted.

2. The chip reference circuit VDDA33 and VDD33W are Wi Fi 3.3V power supply input pins, which need separate power supply. It is recommended to use DCDC for power supply, such as RY3408 DCDC chip. Users can also choose DCDC chip according to the requirements of the scheme. The current drive capacity of DCDC chip must be ＞ 1A. At the same time, pin2&pin3 (VDDA33), pin55&pin56 (VDDA33) and pin16 (VDD33W) are recommended to run star cables from the power supply inlet to the pins, and GND is used for isolation between the cables.

3. If there are requirements for FCC/CE and other EMI certification tests, VIN_ For 5V and VDD33, it is recommended to reserve 100pF grounding capacitance and place it close to the chip reference circuit pin.

4. If the ripple of input power supply is large, other ripple improvement measures such as electrolytic capacitor must be added.

5. The power supply and ground wire shall be laid as wide as possible, and it is recommended to be ＞ 15ml.

RF circuit

1. The chip matching network shall be placed as close to the RFIO pin as possible.

2. RF wiring must be subject to 50 ohm impedance control, and the ground integrity around RF wiring shall be ensured as far as possible on the top layer.

3. The antenna area must be kept hollow.

Crystal circuit

1. Make sure the crystal is well grounded.

2. The copper skin around the top crystal pad is hollow, and the crystal GND pin is directly connected to the second layer GND through the via.

Electrostatic protection requirements

Try to route at TOP and the third floor to maintain the integrity of the ground plane of the second floor and BOTTOM. If ESD devices are designed, try to close the ESD devices to the pins of the plug-in to improve the protection effect.

Other considerations for application

1. It is recommended to directly use external crystal oscillator (PA0 and PA1 are externally connected with 12.288M crystal circuit) for CI230X chip scheme. If the user has high requirements for cost, but has no requirements for the size and accuracy of the chip’s main frequency and the temperature range of the working environment, the RC oscillator built in the chip can be used. However, please note that the RC oscillator built in the chip will have a certain temperature drift in high and low temperature environments due to the semiconductor technology principle. Please reduce the system’s main frequency to below 220MHz when using it. If the working environment temperature of the application needs - 40 to 85 ℃, please use an external crystal oscillator.
2. If the operating temperature range of the application scenario is - 10 to 70 ℃, and only low-speed serial communication is conducted with the upper computer (baud rate is less than or equal to 115200bps), this kind of circuit scheme can directly use the RC oscillator built in the chip (the frequency offset of the upper computer is ≤± 1.5%). When the upper computer is designed without crystal oscillator, the communication error should be minimized. Chipintelli can provide a serial port baud rate adaptive scheme, which requires adding a handshake command to the serial port protocol, and the upper computer ensures that it will reply according to the protocol requirements within 50ms after receiving the handshake command. After adding this adaptive scheme, the product can be used in scenarios where the working environment temperature is - 20 to 85 ℃.
3. The chip is integrated with a PMU management unit. The PMU contains multiple LDOs, which provide 3.3V and 1.1V voltage respectively to the chip. The ripple of the external 5V power supply must be less than 300mV. If the requirements for RF performance and power consumption are high, it is recommended that the external power supply chip provide separate power for VDDA33 and VDD33W.
4. RF devices are sensitive to crystal frequency offset. If the working environment of the product is harsh, it is recommended to choose a wide temperature crystal.
5. Matching network must be reserved for RFIO pin, and impedance matching must be done for routing. If the wiring is too long, it is recommended to reserve a matching network near the antenna.
6. If the product needs to broadcast audio, AGND and HPOUTL pins should be connected to the power amplifier by differential wiring to avoid audio interference and abnormal noise.
7. The chip is manufactured by lead-free environmental protection process. Please set furnace temperature, time and other parameters according to lead-free standard during SMT welding.
8. Pay attention to the influence of static electricity when taking and packaging chips. It is recommended to use anti-static materials for isolation.