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Hardware Design

The CI231 series chip require only a few external components to support a wide range of voice solutions and AIOT applications. For the voice processing, the chip support both single microphone differential input or single-ended input, awith optional AEC (Acoustic Echo Cancellation) functionality. sers can select appropriate circuits based on design requirements for functionality, power consumption, and cost. Below is a detailed description of the simplest application reference circuit for this chip.

Apply Reference Circuit Diagram

Figure H-1 shows the application reference circuit diagram.

Figure H-1 Typical application reference circuit diagram

Above is an application reference diagram of the CI231 series chip supporting single microphone differential input and power amplifier output, with AEC. The chip use 5V direct power supply, and the user can design according to the corresponding peripheral device specifications in the figure above.

If the board-level online upgrade function is to be considered during product design, the UART0 pin can be led out to facilitate Firmware Update of the flash in the main chip through UART0 after PCB board placement is completed. The PA4 (PG_EN) pin of the chip is internally pulled up. The power-on defaults to the upgrade mode. After power-on, the upgrade signal sent from the external UART0 port should be detected. If there is one, the upgrade should be started directly. Extended by adding detection of upgrade mode, the default boot time of the chip is about 850mS; If the user has high requirements for the boot time, the PA4 pin can be led out, two 2.2K Ω pull-down resistors can be added to the ground, and a test point can be added between the two 2.2K Ω resistors. At this time, the chip is powered on in the normal mode, and the boot time is about 350mS, which can shorten the boot time. If you want to upgrade online at this time, you can externally supply high level to the intermediate test points connected by two 2.2K Ω resistors, pull up the PA4 pin, and then upgrade through UART0.

Application with this chip can select differential microphone design or single-ended microphone design, and the differential microphone design in the above figure is recommended. If the user has requirements for cost, the microphone part in the above figure can be modified to a single-ended microphone design, which can use fewer passive devices than the differential microphone. However, this method is only recommended for applications where the microphone line length is less than 20 cm, otherwise the speech recognition effect will not be as good as the differential microphone design because the line length is too long and the anti-interference effect is not enough. The power amplifier shown in the figure above is a Class AB amplifier, with the 8002 power amplifier chip recommended in the diagram. Users may select alternative power amplifier chips based on their specific solution requirements. If the power amplifier function is not required, this circuit section can be omitted to reduce costs. For applications requiring AEC, users can utilize a microphone input channel to connect the AEC analog signal input.

If the user has no special requirements on the power consumption of the solution, it is recommended to directly use the PMU power supply inside the chip. If the power consumption is required, an external DCDC chip can be added to supply power to the chip 1.1V to reduce power consumption. The UART port of the chip supports 5V communication, and the UART0 port in the figure above is connected to 3.3V signal. If you want to connect to 5V, you can add a pull-up resistor connected to 5V on the periphery of the RX and TX pins of UART0, without adding an additional voltage conversion circuit.

PCB Layout Design

Power supply circuit

1. Power cables are routed
Power input pay attention to protect overvoltage and surge protection, design TVS device and 4.7 Ω resistance at 5V input, and route the cable first through TVS and then through the resistance to the chip. The cable diameter of the power supply depends on the actual circuit current. The cable width of the 3.3V power supply is not less than 15mil, and the cable width of the 1.2V power supply is not less than 15mil. Try to use the copper coating mode, the power cable as short and thick as possible, the narrowest part of the power cable is not less than 8mil line width, to avoid the power cable to form a closed-loop circuit.

2. Power decoupling capacitor
The power decoupling capacitor is positioned close to the corresponding pin.

RF Circuit

1. The RF matching network components must be placed as close as possible to the RFIO pin to minimize trace length and parasitic effects.

2. All RF traces must maintain 50Ω characteristic impedance. Ensure proper ground plane continuity around RF traces, particularly on the top layer.

3. Maintain a clear area around the antenna, keeping it free from ground planes and other components that could affect radiation performance.

Crystal Circuit

1. Ensure the crystal oscillator has a solid ground connection to minimize noise and improve stability.

2. Remove copper pour around the crystal pads on the top layer, and connect the crystal’s ground pin directly to the ground plane (Layer 2) using vias placed as close as possible to the ground pin.

Electrostatic protection requirements

In the design of two-layer boards, try to route in the TOP layer to maintain the integrity of the BOTTOM ground plane. If ESD devices are designed, try to close the ESD devices to the pins of the plug-in to improve the protection effect.

Apply other considerations

1. The chip needs an external 16MHz crystal oscillator with an accuracy of 10ppm and a load capacitance of 12pF.
2. The chip integrates the PMU management unit, and the PMU contains three Ldos, which provide 3.3V and 1.1V voltage to the chip respectively. If there is no special requirement for power consumption, the solution does not need an external power chip, and the ripple of the external 5V power supply should be less than 300mV.
3. Rf devices are sensitive to crystal frequency bias, such as the product working environment is harsh, it is recommended to choose a wide temperature crystal; At the same time, if the PCB is a multi-layer board, it is recommended to hollow out the crystal under the adjacent layer to reduce the influence of parasitic capacitance on the crystal frequency bias.
4. RFIO pin must be reserved for matching network, and the wiring must be impedance matching. If the cable length is too long, you are advised to reserve a matching network near the antenna.
5. The chip is manufactured by lead-free environmental protection technology. Please set the reflow temperature and time and other parameters according to lead-free standards when SMT welding.
6. Pay attention to static electricity when using and packing chips. Antistatic materials are recommended for isolation.