Pin Diagram and Functional Description¶
Pin Diagram¶
Pin Description¶
| Pin No. | Pin Name | Type | 5V Tolerant | Default State | Pin Function |
|---|---|---|---|---|---|
| 1 | VDD11 | P | - | - | 1.1V LDO output pin, also serves as core power supply input, requires external 4.7uF capacitor |
| 2 | XIN | I | - | - | ●XIN (default power-on state) ●GPIO PA0 ●PWM2 |
| 3 | XOUT | O | - | - | ●XOUT (default power-on state) ●GPIO PA1 |
| 4 | SRC_SEL | I | - | IN, T+U | ● Clock selection, default NC |
| 5 | BOOT0 | I | - | IN, T+U | ● BOOT mode selection, default NC |
| 6 | PA2 | IO | √ | IN,T+D | ● GPIO PA2 (default power-on state) ● IIS_SDI ● IIC_SDA ● UART1_TX ● PWM0 ● PWMP |
| 7 | PA3 | IO | √ | IN,T+D | ● GPIO PA3 (default power-on state) ● IIS_LRCLK ● IIC_SCL ● UART1_RX1 ● PWM1 ● PWMN |
| 8 | PA4 | IO | √ | IN,T+U | ● GPIO PA4 (default power-on state)/PG_EN (determines programming mode based on level at power-on, high level enables programming function) ● IIS_SDO ● - ● - ● PWM2 ● PWMP |
| 9 | PA5 | IO | √ | IN,T+D | ● GPIO PA5 (default power-on state) ● IIS_SCLK ● - ● UART2_TX ● PWM3 ● PWMN0 |
| 10 | PA6 | IO | √ | IN,T+D | ● GPIO PA6 (default power-on state) ● IIS_MCLK ● - ● UART2_RX ● PWM0 |
| 11 | PA7 | IO | √ | IN,T+D | ● GPIO PA7 (default power-on state) ● PWM0 ● TX1 ● INT0 |
| 12 | PB0 | IO | √ | IN,T+D | ● GPIO PB0 (default power-on state) ● PWM1 ● RX1 ● INT1 |
| 13 | PB1 | IO | √ | IN,T+D | ● GPIO PB1 (default power-on state) ● PWM2 ● TX2 ● PWMP |
| 14 | PB2 | IO | √ | IN,T+D | ● GPIO PB2 (default power-on state) ● PWM3 ● RX2 ● PWMP |
| 15 | PB5 | IO | √ | IN,T+U | ● GPIO PB5 (default power-on state) ● UART0_TX ● IIC_SDA ● PWM1 ● PWMP |
| 16 | PB6 | IO | √ | IN,T+U | ● GPIO PB6 (default power-on state) ● UART0_RX ● IIC_SCL ● PWM2 ● PWMN |
| 17 | TEST_EN | I | - | - | ● Test enable pin, default NC |
| 18 | RSTN | I | - | - | ● Reset pin, active low, default NC |
| 19 | PC4 | IO | - | IN,T+U | ● Reserved (default power-on state) G ● PC4 ● SCL ● PWM0 |
| 20 | PC1 | IO | - | IN,T+D | ● Reserved (default power-on state) G ● PC1 ● TX2 ● PWM3 |
| 21 | PC2 | IO | - | IN,T+U | ● Reserved (default power-on state) G ● PC2 ● RX2 ● PWM2 |
| 22 | PC3 | IO | - | IN,T+U | ● Reserved (default power-on state) G ● PC3 ● SDA ● PWM1 |
| 23 | PC5 | IO | - | IN,T+U | ● Reserved (default power-on state) G ● PC5 ● BOOT1 |
| 24 | MICN | I | - | - | Microphone N input |
| 25 | MICP | I | - | - | Microphone P input |
| 26 | MICBIAS | O | - | - | Microphone bias output |
| 27 | VCM | O | - | - | VCM Output |
| 28 | AGND | P | - | - | Analog ground |
| 29 | HPOUT | O | - | - | DAC output |
| 30 | AVDD | P | - | - | ● Internal LDO-3.3V output ● 3.3V power supply for internal analog circuits Note1 |
| 31 | VIN5V | P | - | - | ● Power supply input, voltage range 3.6V to 5.5V Note1 |
| 32 | PB7 | IO | - | IN,T+U | ● GPIO PB7 |
| 33 | GND | P | - | - | Ground pin |
Note1: This pin requires an external 4.7uF capacitor
Note2: If this pin is high at power-on, the system will enter programming mode
Symbol Definitions¶
I Input
O Output
IO Bidirectional
P Power or Ground
T+D Tri-state with pull-down
T+U Tri-state with pull-up
OUT Default to output mode at power-on
IN Default to input mode at power-on
All IOs support configurable drive strength and pull-up/down resistors.
Multiplexing Functions¶
| Pin Name | Function1 | Function2 | Function3 | Function4 | Function5 | Function6 | Specific Function |
|---|---|---|---|---|---|---|---|
| PA0 | PA0 | PWM2 | - | - | - | - | XIN |
| PA1 | XOUT | ||||||
| PA2 | PA2 | - | IIC_SDA | UART1_TX | PWM0 | PWMP | - |
| PA3 | PA3 | - | IIC_SCL | UART1_RX | PWM1 | PWMN | - |
| PA4 | PA4 | - | - | - | PWM2 | - | PG_EN Note3 |
| PA5 | PA5 | SCLK | TX2 | PWM3 | PWMN | ||
| PA6 | PA6 | MCLK | RX2 | PWM0 | |||
| PA7 | PA7 | PWM0 | TX1 | INT0 | |||
| PB0 | PB0 | PWM1 | RX1 | INT1 | |||
| PB1 | PB1 | PWM2 | TX2 | PWMP | |||
| PB2 | PB2 | PWM3 | RX2 | PWMP | |||
| PB5 | PB5 | UART0_TX | IIC_SDA | PWM1 | PWMP | - | - |
| PB6 | PB6 | UART0_RX | IIC_SCL | PWM2 | PWMN | - | - |
| PC4 | - | PC4 | SCL | PWM0 | |||
| PC1 | - | PC1 | TX2 | PWM3 | |||
| PC2 | - | PC2 | RX2 | PWM2 | |||
| PC3 | - | PC3 | SDA | PWM1 | |||
| PC5 | PC5 | BOOT1 |
Note3: The PA4 (PG_EN) pin has an internal pull-up by default. If the system detects this pin is high at power-on and there is a Firmware Update signal on the UART0 interface, it will automatically enter upgrade mode, allowing programming of the internal Flash via the upgrade tool. If no Firmware Update signal is detected on the UART0 interface, or if the PA4 pin voltage is detected as low, the system will enter normal operation mode.